[Intel-gfx] [PATCH 3/4] drm/i915/bxt: Enable WaOCLCoherentLineFlush

[Nick Hoath]

Signed-off-by: Nick Hoath <nicholas.hoath at intel.com>
Cc: Rafael Barbalho <rafael.barbalho at intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 1 +
 drivers/gpu/drm/i915/intel_pm.c | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b9f6b8c..115911a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5807,6 +5807,7 @@ enum skl_disp_power_wells {
 #define  GEN7_WA_L3_CHICKEN_MODE				0x20000000
 
 #define GEN7_L3SQCREG4				0xb034
+#define  GEN8_PIPELINE_FLUSH_COHERENT_LINES	(1<<21)
 #define  L3SQ_URB_READ_CAM_MATCH_DISABLE	(1<<27)
 
 #define GEN8_L3SQCREG4				0xb118
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index f29e575..26ef146 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -67,6 +67,10 @@ static void gen9_init_clock_gating(struct drm_device *dev)
 	I915_WRITE(GEN7_FF_THREAD_MODE,
 		   I915_READ(GEN7_FF_THREAD_MODE) &
 		   ~(GEN8_FF_DS_REF_CNT_FFME | GEN7_FF_VS_REF_CNT_FFME));
+
+	/* WaOCLCoherentLineFlush:skl,bxt */
+	I915_WRITE(GEN8_L3SQCREG4, I915_READ(GEN8_L3SQCREG4) |
+			GEN8_PIPELINE_FLUSH_COHERENT_LINES);
 }
 
 static void skl_init_clock_gating(struct drm_device *dev)
-- 
2.1.1