[Intel-gfx] [PATCH 1/4] drm/i915/bxt: Enable WaVSRefCountFullforceMissDisable
Mika Kuoppala
mika.kuoppala at linux.intel.com
Mon Jun 29 07:08:02 PDT 2015
Hi,
Nick Hoath <nicholas.hoath at intel.com> writes:
> From: Rafael Barbalho <rafael.barbalho at intel.com>
>
> Signed-off-by: Rafael Barbalho <rafael.barbalho at intel.com>
> Signed-off-by: Nick Hoath <nicholas.hoath at intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 32ff034..d635d0a 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -59,6 +59,11 @@ static void gen9_init_clock_gating(struct drm_device *dev)
> /* WaEnableLbsSlaRetryTimerDecrement:skl */
> I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) |
> GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE);
> +
> + /* WaVSRefCountFullforceMissDisable:skl,bxt */
> + I915_WRITE(GEN7_FF_THREAD_MODE,
> + I915_READ(GEN7_FF_THREAD_MODE) &
> + ~(GEN7_FF_VS_REF_CNT_FFME));
> }
>
This bit 19 seems to be about Tesselation DOP gating disable
with gen9+ onwards. And with that workaroundname, the applicability
should be hsw,bdw. I am confused.
-Mika
> static void skl_init_clock_gating(struct drm_device *dev)
> --
> 2.1.1
>
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