[Intel-gfx] [PATCH 4/4] drm/i915/bxt: Clean up bxt_init_clock_gating

Mika Kuoppala mika.kuoppala at linux.intel.com
Mon Jun 29 07:29:45 PDT 2015


Nick Hoath <nicholas.hoath at intel.com> writes:

> Add stepping check for A0 workarounds, and remove the associated
> FIXME tags.
> Split out unrelated WAs for later condition checking.
>
> v2: Fixed format (PeterL)
> v3: Corrected stepping check for WaDisableSDEUnitClockGating
>     - Ignoring comment, following hardware spec instead. (ChrisH)
>     Added description for TILECTL setting (JonB)
>
> Cc: Peter Lawthers <peter.lawthers at intel.com>
> Cc: Chris Harris <chris.harris at intel.com>
> Cc: Jon Bloomfield <jon.bloomfield at intel.com>
> Signed-off-by: Nick Hoath <nicholas.hoath at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 16 +++++++++++-----
>  1 file changed, 11 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 26ef146..86a4ced 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -115,18 +115,24 @@ static void bxt_init_clock_gating(struct drm_device *dev)
>  
>  	gen9_init_clock_gating(dev);
>  
> +	/* WaDisableSDEUnitClockGating:bxt */
> +	I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> +		   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> +
>  	/*
>  	 * FIXME:
> -	 * GEN8_SDEUNIT_CLOCK_GATE_DISABLE applies on A0 only.
>  	 * GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ applies on 3x6 GT SKUs only.
>  	 */
> -	 /* WaDisableSDEUnitClockGating:bxt */
>  	I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> -		   GEN8_SDEUNIT_CLOCK_GATE_DISABLE |
>  		   GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
>  

I guess you decided not to combine the writes due to FIXME.

Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>


> -	/* FIXME: apply on A0 only */
> -	I915_WRITE(TILECTL, I915_READ(TILECTL) | TILECTL_TLBPF);
> +	if (INTEL_REVID(dev) == BXT_REVID_A0) {
> +		/*
> +		 * Hardware specification requires this bit to be
> +		 * set to 1 for A0
> +		 */
> +		I915_WRITE(TILECTL, I915_READ(TILECTL) | TILECTL_TLBPF);
> +	}
>  }
>  
>  static void i915_pineview_get_mem_freq(struct drm_device *dev)
> -- 
> 2.1.1
>
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