[Intel-gfx] [PATCH 0/6] A bit of debug info for DMC/CSR
Damien Lespiau
damien.lespiau at intel.com
Tue Jun 30 11:28:53 PDT 2015
We're flying a bit blind, so add some debug information about the DMC firmware.
# cat /sys/kernel/debug/dri/0/i915_dmc_info
status: loaded
version: 1.18
DC5 allowed: no
DC6 allowed: yes
DC9 allowed: no
DC3 -> DC5 count: 0
DC5 -> DC6 count: 0
--
Damien
Damien Lespiau (6):
drm/i915/skl: Print the DMC firmware status in debugfs
drm/i915/skl: Store and print the DMC firmware version we load
drm/i915/skl: Expose DC5/DC6 entry counts
drm/i915/skl: Embed the CSR lock into its own structure
drm/i915/skl: Print out if we allow DC5/DC6 in debugfs
drm/i915/bxt: Print out if we allow DC9 in debugfs
drivers/gpu/drm/i915/i915_debugfs.c | 42 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_dma.c | 1 -
drivers/gpu/drm/i915/i915_drv.h | 11 ++++++---
drivers/gpu/drm/i915/i915_reg.h | 4 ++++
drivers/gpu/drm/i915/intel_csr.c | 22 +++++++++++------
drivers/gpu/drm/i915/intel_runtime_pm.c | 30 +++++++++++++++++++++++
6 files changed, 99 insertions(+), 11 deletions(-)
--
2.1.0
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