[Intel-gfx] [PATCH 1/7] drm/i915: PSR: Remove wrong LINK_DISABLE.
Daniel Vetter
daniel at ffwll.ch
Mon Mar 2 09:56:09 PST 2015
On Fri, Feb 27, 2015 at 08:26:01PM -0500, Rodrigo Vivi wrote:
> This wrong logic and useless define came from first versions and
> came along with all rework. Just now I notice how ugly, wrong and
> useless this is.
>
> val is already defined as 0 anyway and logic is completelly wrong
> and useless. So let's starting the link_standby fix with this
> cleaning.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 -
> drivers/gpu/drm/i915/intel_psr.c | 3 +--
> 2 files changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 55143cb..b95554d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -2658,7 +2658,6 @@ enum skl_disp_power_wells {
> #define EDP_PSR_CTL(dev) (EDP_PSR_BASE(dev) + 0)
> #define EDP_PSR_ENABLE (1<<31)
> #define BDW_PSR_SINGLE_FRAME (1<<30)
> -#define EDP_PSR_LINK_DISABLE (0<<27)
Please don't remove the #define if that itself is correct.
-Daniel
> #define EDP_PSR_LINK_STANDBY (1<<27)
> #define EDP_PSR_MIN_LINK_ENTRY_TIME_MASK (3<<25)
> #define EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES (0<<25)
> diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
> index b9f40c2..2e6831d 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -247,8 +247,7 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp)
> val |= EDP_PSR_TP2_TP3_TIME_0us;
> val |= EDP_PSR_TP1_TIME_0us;
> val |= EDP_PSR_SKIP_AUX_EXIT;
> - } else
> - val |= EDP_PSR_LINK_DISABLE;
> + }
>
> I915_WRITE(EDP_PSR_CTL(dev), val |
> (IS_BROADWELL(dev) ? 0 : link_entry_time) |
> --
> 1.9.3
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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