[Intel-gfx] [v2 2/5] drm/i915: Limit max VCO supported in CHV to 6.48GHz

[Ville Syrjälä]

On Thu, Mar 05, 2015 at 04:52:56PM +0100, Daniel Vetter wrote:
> On Mon, Feb 16, 2015 at 01:21:34PM +0200, Ville Syrjälä wrote:
> > On Mon, Feb 16, 2015 at 03:07:59PM +0530, Vijay Purushothaman wrote:
> > > As per the recommendation from PHY team, limit the max vco supported in CHV to 6.48 GHz
> > > 
> > > Signed-off-by: Vijay Purushothaman <vijay.a.purushothaman at linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_display.c |    2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > > index 3b0fe9f..4e710f6 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > @@ -390,7 +390,7 @@ static const intel_limit_t intel_limits_chv = {
> > >  	 * them would make no difference.
> > >  	 */
> > >  	.dot = { .min = 25000 * 5, .max = 540000 * 5},
> > > -	.vco = { .min = 4860000, .max = 6700000 },
> > > +	.vco = { .min = 4860000, .max = 6480000 },
> > 
> > I have a patch here to reduce the minimum to 4.80 GHz, otherwise I can't
> > get my 2560x1440 HDMI display working (241.5 MHz clock). With that change
> > we still have a gap (233-240 MHz) in the frequencies we can produce.
> > Reducing the max to 6.48 GHz will increase that gap to 216-240 MHz, which
> > is a bit unfortunate. But if that's the recommendation we should follow
> > it I suppose, and hope no HDMI displays will want such frequencies.
> > 
> > Is there an updated spreadsheet available with the new limits? Quite a
> > few of the frequencies in the original spreadsheet did have vco>6.48
> > GHz.
> > 
> > I any case this seems OK, so
> > Acked-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> This one doesn't apply any more ... still needed?

Supposedly, yes.

-- 
Ville Syrjälä
Intel OTC