[Intel-gfx] [PATCH 0/6] SKL post-enable power well hook (v2)

Damien Lespiau damien.lespiau at intel.com
Fri Mar 6 10:50:47 PST 2015


Here's a new spin of the series, restoring interrupt registers and DDI
translation tables when re-enabling power-wells.

v2:
  - Don't run the post-enable hook when the power well is already enabled
  - Put the DDI patch with the rest of the serise

-- 
Damien


Damien Lespiau (6):
  drm/i915/skl: Make gen8_irq_power_well_post_enable() take a pipe mask
  drm/i915/skl: Introduce enable_requested and is_enabled in the power
    well code
  drm/i915/skl: Mirror what we do on HSW for the power well enable log
    message
  drm/i915/skl: Restore pipe interrupt registers after power well
    enabling
  drm/i915: Remove unused condition in hsw_power_well_post_enable()
  drm/i915/skl: Restore the DDI translation tables when enabling PW1

 drivers/gpu/drm/i915/i915_irq.c         | 19 +++++++++----
 drivers/gpu/drm/i915/intel_drv.h        |  3 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c | 50 ++++++++++++++++++++++++++++-----
 3 files changed, 59 insertions(+), 13 deletions(-)

-- 
1.8.3.1



More information about the Intel-gfx mailing list