[Intel-gfx] [PATCH 0/2] SSEU detection for CHV

[Daniel Vetter]

On Fri, Mar 06, 2015 at 05:38:33PM -0800, Jeff McGee wrote:
> On Fri, Feb 27, 2015 at 10:22:30AM -0800, jeff.mcgee at intel.com wrote:
> > From: Jeff McGee <jeff.mcgee at intel.com>
> > 
> > These two patches add detection of available and enabled
> > slice/subslice/EU on CHV following the implementation recently
> > merged for SKL. They have been requested to help CHV users
> > determine their configuration through the debugfs interface.
> > 
> > Jeff McGee (2):
> >   drm/i915/chv: Determine CHV slice/subslice/EU info
> >   drm/i915/chv: Add CHV HW status to SSEU status
> > 
> >  drivers/gpu/drm/i915/i915_debugfs.c | 31 ++++++++++++++++++++++++++--
> >  drivers/gpu/drm/i915/i915_dma.c     | 40 +++++++++++++++++++++++++++++++------
> >  drivers/gpu/drm/i915/i915_reg.h     | 13 ++++++++++++
> >  3 files changed, 76 insertions(+), 8 deletions(-)
> > 
> 
> This appears reviewed and ready for merge. Can we merge?

I didn't realize that you've resent patch 1 since it wasn't in-reply-to v1
of patch 1/2 but as a reply to the cover letter. Reply-to cover letter is
usually used for additional follow-up patches. Hence I didn't realize that
your patches are ready for merging.

Applied now, thanks.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch