[Intel-gfx] [PATCH 00/49] Basic Broxton enabling

[Imre Deak]

Hi,

This patchset adds basic graphics driver support for Broxton (BXT).

Broxton is the latest Intel® Atom(tm) Processor from Intel® with HD Graphics.

The major GPU hardware features include:
- Gen9 Intel® HD Graphics
- The addition of a 3rd display plane
- Three HDMI/DP/eDP display ports
- Two MIPI/DSI display ports

The GPU side is very similar to the one in Skylake. This is also true
for the display side, with the exception of the added DSI ports and a
different DP/HDMI PHY hardware implementation, the latter one being a
Valleyview/Cherryview derivative. Based on this most of the patches in
this series are related to the display side. Features yet to be
implemented include DSI support and runtime power management, patches
for these will follow after this series.

Thanks for all who contributed to this effort, especially:
Damien Lespiau
Satheesh Krishna
Vandana Kannan
Ben Widawsky
Jesse Barnes

--Imre

A.Sunil Kamath (4):
  drm/i915/bxt: Add change to support gmbus pin pair for BXT
  drm/i915/bxt: WARN in case BXT unused gmbus ports are accessed
  drm/i915/bxt: Avoid registering unused gmbus ports as i2c adapter
  drm/i915/bxt: Implement enable/disable for Display C9 state

Ben Widawsky (3):
  drm/i915/bxt: add GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ workaround
  drm/i915/bxt: add WaDisableMaskBasedCammingInRCC workaround
  drm/i915/skl: add WaDisableMaskBasedCammingInRCC workaround

Daisy Sun (1):
  drm/i915/bxt: BXT FBC enablement

Damien Lespiau (8):
  drm/i915/bxt: Add BXT PCI ids
  drm/i915/bxt: Broxton uses the same GMS values as Skylake
  drm/i915/bxt: Broxton has 3 sprite planes on pipe A/B, 2 on pipe C
  drm/i915/bxt: Add the plane4 related interrupt definitions
  drm/i915/bxt: Broxton DDB is 512 blocks
  drm/i915/bxt: Broxton raises the maximum number of planes to 4
  drm/i915: Iterate through the initialized DDIs to prepare their
    buffers
  drm/i915: Don't write the HDMI buffer translation entry when not
    needed

Imre Deak (10):
  drm/i915/bxt: map GTT as uncached
  drm/i915/gen9: fix PIPE_CONTROL flush for VS_INVALIDATE
  drm/i915/bxt: add bxt_init_clock_gating
  drm/i915/bxt: add GEN8_SDEUNIT_CLOCK_GATE_DISABLE workaround
  drm/i915/bxt: add description about the BXT PHYs
  drm/i915: factor out vlv_PLL_is_optimal
  drm/i915: check for div-by-zero in vlv_PLL_is_optimal
  drm/i915/chv: use vlv_PLL_is_optimal in chv_find_best_dpll
  drm/i915/bxt: add bxt_find_best_dpll
  drm/i915: suppress false PLL state warnings on non-GMCH platforms

Jesse Barnes (1):
  drm/i915/bxt: fix panel fitter setup in crtc disable/enable

Nick Hoath (1):
  drm/i915/bxt: HardWare WorkAround ring initialisation for Broxton

Robert Beckett (1):
  drm/i915/bxt: add workaround to avoid PTE corruption

Satheeshakrishna M (8):
  drm/i915/bxt: Add IS_BROXTON macro
  drm/i915/bxt: Define BXT power domains
  drm/i915/bxt: Restrict PORT_CLK_SEL programming below gen9
  drm/i915/bxt: Define bxt DDI PLLs and implement enable/disable
    sequence
  drm/i915/bxt: BXT clock divider calculation
  drm/i915/bxt: Assign PLL for pipe
  drm/i915/bxt: Determine PLL attached to pipe
  drm/i915/bxt: Determine programmed frequency

Shashank Sharma (4):
  drm/i915/bxt: DDI Hotplug interrupt setup
  drm/i915/bxt: Add DDI hpd handler
  drm/i915/bxt: Add BXT support in gen8_irq functions
  drm/i915/bxt: Enable GMBUS IRQ

Suketu Shah (1):
  drm/i915/bxt: Add DC9 Trigger sequence

Sumit Singh (1):
  drm/i915/bxt: Enable PTE encoding

Vandana Kannan (6):
  drm/i915/bxt: don't use unsupported port detection
  drm/i915/bxt: Increase DDI buf idle timeout
  drm/i915: Rename vlv_cdclk_freq to cdclk_freq
  drm/i915/bxt: add display initialize/uninitialize sequence
  drm/i915/bxt: VSwing programming sequence
  drm/i915/bxt: Update max level of vswing

 Documentation/DocBook/drm.tmpl          |   4 +-
 arch/x86/kernel/early-quirks.c          |   1 +
 drivers/gpu/drm/i915/i915_dma.c         |   6 +-
 drivers/gpu/drm/i915/i915_drv.c         |  45 +-
 drivers/gpu/drm/i915/i915_drv.h         |  20 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c     |   9 +-
 drivers/gpu/drm/i915/i915_irq.c         | 122 ++++-
 drivers/gpu/drm/i915/i915_reg.h         | 316 ++++++++++++-
 drivers/gpu/drm/i915/intel_bios.c       |   3 +-
 drivers/gpu/drm/i915/intel_ddi.c        | 787 ++++++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/intel_display.c    | 290 ++++++++++--
 drivers/gpu/drm/i915/intel_dp.c         |  70 ++-
 drivers/gpu/drm/i915/intel_dp_mst.c     |   6 +-
 drivers/gpu/drm/i915/intel_drv.h        |  11 +
 drivers/gpu/drm/i915/intel_dvo.c        |   2 +-
 drivers/gpu/drm/i915/intel_i2c.c        |  79 +++-
 drivers/gpu/drm/i915/intel_lrc.c        |  19 +-
 drivers/gpu/drm/i915/intel_lvds.c       |   2 +-
 drivers/gpu/drm/i915/intel_pm.c         |  33 +-
 drivers/gpu/drm/i915/intel_ringbuffer.c |  21 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c | 121 +++++
 drivers/gpu/drm/i915/intel_sdvo.c       |   4 +-
 include/drm/i915_pciids.h               |   6 +
 23 files changed, 1857 insertions(+), 120 deletions(-)

-- 
2.1.0