[Intel-gfx] [PATCH 14/49] drm/i915/bxt: add GEN8_SDEUNIT_CLOCK_GATE_DISABLE workaround

[Daniel Vetter]

On Tue, Mar 17, 2015 at 11:39:40AM +0200, Imre Deak wrote:
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 3d4a7c3..d5dd0b3 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -96,7 +96,18 @@ static void skl_init_clock_gating(struct drm_device *dev)
>  
>  static void bxt_init_clock_gating(struct drm_device *dev)
>  {
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +
>  	gen9_init_clock_gating(dev);
> +
> +	/*
> +	 * FIXME:
> +	 * GEN8_SDEUNIT_CLOCK_GATE_DISABLE applies on A0 only.

We have pci revid macros now. Do you have plans to roll similar ones out
for bxt?
-Daniel

> +	 */
> +	 /* WaDisableSDEUnitClockGating:bxt */
> +	I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> +		   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> +
>  }
>  
>  static void i915_pineview_get_mem_freq(struct drm_device *dev)
> -- 
> 2.1.0
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch