[Intel-gfx] [PATCH 18/49] drm/i915/bxt: add workaround to avoid PTE corruption

[Daniel Vetter]

On Tue, Mar 17, 2015 at 11:39:44AM +0200, Imre Deak wrote:
> From: Robert Beckett <robert.beckett at intel.com>
> 
> Set TLBPF in TILECTL. This fixes an issue with BXT HW seeing
> corrupted pte entries.

Is this for the ggtt or ppgtt ptes?
-Daniel

> 
> v2:
> - move the workaround to bxt_init_clock_gating (imre)
> 
> Signed-off-by: Robert Beckett <robert.beckett at intel.com> (v1)
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 1 +
>  drivers/gpu/drm/i915/intel_pm.c | 2 ++
>  2 files changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 1d074e8..d69d7b9 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1151,6 +1151,7 @@ enum skl_disp_power_wells {
>  /* control register for cpu gtt access */
>  #define TILECTL				0x101000
>  #define   TILECTL_SWZCTL			(1 << 0)
> +#define   TILECTL_TLBPF			(1 << 1)
>  #define   TILECTL_TLB_PREFETCH_DIS	(1 << 2)
>  #define   TILECTL_BACKSNOOP_DIS		(1 << 3)
>  
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 52d3c02..d3f2557 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -110,6 +110,8 @@ static void bxt_init_clock_gating(struct drm_device *dev)
>  		   GEN8_SDEUNIT_CLOCK_GATE_DISABLE |
>  		   GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
>  
> +	/* FIXME: apply on A0 only */
> +	I915_WRITE(TILECTL, I915_READ(TILECTL) | TILECTL_TLBPF);
>  }
>  
>  static void i915_pineview_get_mem_freq(struct drm_device *dev)
> -- 
> 2.1.0
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch