[Intel-gfx] [PATCH 35/49] drm/i915/bxt: fix panel fitter setup in crtc disable/enable
Daniel Vetter
daniel at ffwll.ch
Wed Mar 18 01:37:53 PDT 2015
On Tue, Mar 17, 2015 at 04:22:33PM +0200, Imre Deak wrote:
> On ti, 2015-03-17 at 14:51 +0100, Daniel Vetter wrote:
> > On Tue, Mar 17, 2015 at 11:40:01AM +0200, Imre Deak wrote:
> > > From: Jesse Barnes <jbarnes at virtuousgeek.org>
> > >
> > > Broxton has the same panel fitter registers as Skylake.
> > >
> > > Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> > > Signed-off-by: Imre Deak <imre.deak at intel.com>
> > > ---
> > > drivers/gpu/drm/i915/intel_display.c | 6 +++---
> > > 1 file changed, 3 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > > index ba2d1ae..95ce0a8 100644
> > > --- a/drivers/gpu/drm/i915/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/intel_display.c
> > > @@ -4532,7 +4532,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
> > >
> > > intel_ddi_enable_pipe_clock(intel_crtc);
> > >
> > > - if (IS_SKYLAKE(dev))
> > > + if (INTEL_INFO(dev)->gen == 9)
> >
> > Shouldn't we go with gen >= 9 here while at it?
>
> == 9 looks like the right choice based on bspec.
Then maybe add a else if (gen > 9) MISSING_CASE(gen); afterwards? Just
trying to avoid surprises when enabling skl/bxt+1 ...
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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