[Intel-gfx] [RFC v5 2/9] gpio/crystalcove: Add additional GPIO for Panel control

[Linus Walleij]

On Thu, Mar 12, 2015 at 5:31 PM, Shobhit Kumar <shobhit.kumar at intel.com> wrote:

> Export PANEL_EN/DISABLE (offset 0x52) as additional GPIO. Needed
> by display driver to enable the DSI panel on BYT platform where
> the Panel EN/Disable control is routed thorugh CRC PMIC
>
> CC: Samuel Ortiz <sameo at linux.intel.com>
> Cc: Linus Walleij <linus.walleij at linaro.org>
> Cc: Alexandre Courbot <gnurou at gmail.com>
> Cc: Thierry Reding <thierry.reding at gmail.com>
> Signed-off-by: Shobhit Kumar <shobhit.kumar at intel.com>

NACK.

Spawn a separate MFD cell and write a fixed voltage
regulator driver for this.

> @@ -39,6 +39,7 @@
>  #define GPIO0P0CTLI            0x33
>  #define GPIO1P0CTLO            0x3b
>  #define GPIO1P0CTLI            0x43
> +#define GPIOPANELCTL           0x52

This is even a lie, you say in the commit message that the
register is indeed named PANEL_EN/DISABLE and is not
a GPIO.

Yours,
Linus Walleij