[Intel-gfx] [PATCH v2] drm/i915: Fallback to using unmappable memory for scanout

[Deepak S]

On Thursday 19 March 2015 04:59 PM, Chris Wilson wrote:
> The existing ABI says that scanouts are pinned into the mappable region
> so that legacy clients (e.g. old Xorg or plymouthd) can write directly
> into the scanout through a GTT mapping. However if the surface does not
> fit into the mappable region, we are better off just trying to fit it
> anywhere and hoping for the best. (Any userspace that is cappable of
> using ginormous scanouts is also likely not to rely on pure GTT
> updates.) In the future, there may even be a kernel mediated method for
> the legacy clients.
>
> v2: Skip fence pinning when not mappable.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Satyanantha, Rama Gopal M <rama.gopal.m.satyanantha at intel.com>
> Cc: Deepak S <deepak.s at linux.intel.com>
> Cc: Damien Lespiau <damien.lespiau at intel.com>
> Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
> ---
>   drivers/gpu/drm/i915/i915_gem.c      |  7 ++++++-
>   drivers/gpu/drm/i915/intel_display.c | 23 +++++++++++++----------
>   2 files changed, 19 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 9e498e0bbf22..9a1de848e450 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4034,10 +4034,15 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
>   
>   	/* As the user may map the buffer once pinned in the display plane
>   	 * (e.g. libkms for the bootup splash), we have to ensure that we
> -	 * always use map_and_fenceable for all scanout buffers.
> +	 * always use map_and_fenceable for all scanout buffers. However,
> +	 * it may simply be too big to fit into mappable, in which case
> +	 * put it anyway and hope that userspace can cope (but always first
> +	 * try to preserve the existing ABI).
>   	 */
>   	ret = i915_gem_obj_ggtt_pin(obj, alignment, PIN_MAPPABLE);
>   	if (ret)
> +		ret = i915_gem_obj_ggtt_pin(obj, alignment, 0);
> +	if (ret)
>   		goto err_unpin_display;
>   
>   	i915_gem_object_flush_cpu_write_domain(obj);
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index d621ebecd33e..628aace63b43 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2308,16 +2308,18 @@ intel_pin_and_fence_fb_obj(struct drm_plane *plane,
>   	if (ret)
>   		goto err_interruptible;
>   
> -	/* Install a fence for tiled scan-out. Pre-i965 always needs a
> -	 * fence, whereas 965+ only requires a fence if using
> -	 * framebuffer compression.  For simplicity, we always install
> -	 * a fence as the cost is not that onerous.
> -	 */
> -	ret = i915_gem_object_get_fence(obj);
> -	if (ret)
> -		goto err_unpin;
> +	if (obj->map_and_fenceable) {
> +		/* Install a fence for tiled scan-out. Pre-i965 always needs a
> +		 * fence, whereas 965+ only requires a fence if using
> +		 * framebuffer compression.  For simplicity, we always, when
> +		 * possible, install a fence as the cost is not that onerous.
> +		 */
> +		ret = i915_gem_object_get_fence(obj);
> +		if (ret)
> +			goto err_unpin;
>   
> -	i915_gem_object_pin_fence(obj);
> +		i915_gem_object_pin_fence(obj);
> +	}
>   
>   	dev_priv->mm.interruptible = true;
>   	intel_runtime_pm_put(dev_priv);
> @@ -2335,7 +2337,8 @@ static void intel_unpin_fb_obj(struct drm_i915_gem_object *obj)
>   {
>   	WARN_ON(!mutex_is_locked(&obj->base.dev->struct_mutex));
>   
> -	i915_gem_object_unpin_fence(obj);
> +	if (obj->map_and_fenceable)
> +		i915_gem_object_unpin_fence(obj);
>   	i915_gem_object_unpin_from_display_plane(obj);
>   }
>   

should we skip put_fence in overlay_do_put_image ?