[Intel-gfx] [PATCH 0/5] Gen6/7 PPGTT dynamic page alloc prep work

[Daniel Vetter]

On Thu, Mar 19, 2015 at 03:32:06PM +0200, Mika Kuoppala wrote:
> Michel Thierry <michel.thierry at intel.com> writes:
> 
> > Splitting this prep work should ease the code review and help identify
> > problems (and also shrink the Gen8 patch series, which is of more interest).
> >
> > 4 patches have already been sent as part of the main patchset, only "page
> > table generalizations" is brand new (suggested by Mika) and should help to
> > clean some of the code.
> >
> > Ben Widawsky (4):
> >   drm/i915: Extract context switch skip and add pd load logic
> >   drm/i915: Track GEN6 page table usage
> >   drm/i915: Track page table reload need
> >   drm/i915: Initialize all contexts
> >
> > Michel Thierry (1):
> >   drm/i915: page table generalizations
> >
> 
> Patches:
> 1,2,3,4v7,5
> 
> Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>

All merged, thanks for patches&review.

Another thing that Chris just mentioned again on irc is the use of size_t
in i915_gem_gtt.c. That doesn't really make sense in hw driver code. At
the end of this ggtt endeavor we should throw a patch on top which
mass-replaces size_t with uint64_t and also audits the code for any kinds
of evil overflows. We definitely have bugs since 48bit gtt doesn't work on
32bit kernels. Not that this is an interesting feature, but because C
being careful with integer conversion is always good practice - it can
blow up in rather interesting ways.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch