[Intel-gfx] [PATCH] drm/i915: Reduce frequency of unspecific HSW reg debugging

[Chris Wilson]

On Mon, Mar 23, 2015 at 09:43:19AM +0000, Chris Wilson wrote:
> On Mon, Mar 23, 2015 at 10:35:16AM +0100, Daniel Vetter wrote:
> > On Sun, Mar 22, 2015 at 03:41:04PM +0000, Chris Wilson wrote:
> > > Delay the expensive read on the FPGA_DBG register from once per mmio to
> > > once per forcewake section when we are doing the general wellbeing
> > > check rather than the targetted error detection. This almost reduces
> > > the overhead of the debug facility (for example when submitting execlists)
> > > to zero whilst keeping the debug checks around.
> > > 
> > > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > > Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> > > Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
> > 
> > Unfortunately the unclaimed reg stuff is most useful for debugging display
> > power well issues (it catches those while nothing else really does), and
> > this removes that facility. Can't we do tricks with using raw reads/writes
> > for forcewaked registers or something like that?
> 
> How about beefing up intel_uncore_check_errors() to enable one-shot
> mmio_debug as well? Then if it is an i915 error we would catch it on the
> next cycle.

So something like:
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 6b065592aede..a10bf6a5c55b 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1416,11 +1416,6 @@ int intel_gpu_reset(struct drm_device *dev)
 
 void intel_uncore_check_errors(struct drm_device *dev)
 {
-       struct drm_i915_private *dev_priv = dev->dev_private;
-
-       if (HAS_FPGA_DBG_UNCLAIMED(dev) &&
-           (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM)) {
-               DRM_ERROR("Unclaimed register before interrupt\n");
-               __raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
-       }
+       if (HAS_FPGA_DBG_UNCLAIMED(dev))
+               hsw_unclaimed_reg_detect(to_i915(dev));
 }


-- 
Chris Wilson, Intel Open Source Technology Centre