[Intel-gfx] [PATCH] drm/i915: Skip allocating shadow batch for 0-length batches
shuang.he at intel.com
shuang.he at intel.com
Wed Mar 25 01:25:00 PDT 2015
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 6036
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -1 275/275 274/275
ILK 303/303 303/303
SNB 304/304 304/304
IVB 339/339 339/339
BYT 287/287 287/287
HSW 361/361 361/361
BDW 310/310 310/310
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
PNV igt at gem_userptr_blits@minor-unsync-normal DMESG_WARN(1)PASS(2) DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'
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