[Intel-gfx] [PATCH] drm/i915: Add fault address to error state for gen8 and gen9

[shuang.he at intel.com]

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 6039
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                 -2              275/275              273/275
ILK                                  303/303              303/303
SNB                 -1              304/304              303/304
IVB                                  339/339              339/339
BYT                                  287/287              287/287
HSW                                  361/361              361/361
BDW                                  310/310              310/310
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*PNV  igt at gem_userptr_blits@minor-normal-sync      PASS(3)      DMESG_WARN(1)PASS(1)
 PNV  igt at gem_userptr_blits@minor-unsync-normal      DMESG_WARN(2)PASS(2)      DMESG_WARN(1)PASS(1)
*SNB  igt at kms_mmio_vs_cs_flip@setplane_vs_cs_flip      PASS(2)      FAIL(1)PASS(1)
Note: You need to pay more attention to line start with '*'