[Intel-gfx] [PATCH 3/3] tools/intel_error_decode: Add gen8+ fault data encodings

[Mika Kuoppala]

These two registers contains the 48bit fault address.

Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
---
 tools/intel_error_decode.c | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/tools/intel_error_decode.c b/tools/intel_error_decode.c
index 553307f..7c32fc3 100644
--- a/tools/intel_error_decode.c
+++ b/tools/intel_error_decode.c
@@ -401,6 +401,19 @@ print_fault_reg(unsigned devid, uint32_t reg)
 		printf("    Address 0x%08x\n", reg & ~((1 << 12)-1));
 }
 
+static void
+print_fault_data(unsigned devid, uint32_t data1, uint32_t data0)
+{
+	uint64_t address;
+
+	if (intel_gen(devid) < 8)
+		return;
+
+	address = ((uint64_t)(data0) << 12) | ((uint64_t)data1 & 0xf) << 44;
+	printf("    Address 0x%016" PRIx64 " %s\n", address,
+	       data1 & (1 << 4) ? "GGTT" : "PPGTT");
+}
+
 #define MAX_RINGS 10 /* I really hope this never... */
 uint32_t head[MAX_RINGS];
 int head_ndx = 0;
@@ -482,7 +495,7 @@ read_data_file(FILE *file)
 
 		matched = sscanf(line, "%08x : %08x", &offset, &value);
 		if (matched != 2) {
-			unsigned int reg;
+			unsigned int reg, reg2;
 
 			/* display reg section is after the ringbuffers, don't mix them */
 			decode(decode_ctx, is_batch, ring_name, gtt_offset,
@@ -545,6 +558,10 @@ read_data_file(FILE *file)
 			if (matched == 1 && reg)
 				print_fault_reg(devid, reg);
 
+			matched = sscanf(line, "  FAULT_TLB_DATA: 0x%08x 0x%08x\n", &reg, &reg2);
+			if (matched == 2)
+				print_fault_data(devid, reg, reg2);
+
 			continue;
 		}
 
-- 
1.9.1