[Intel-gfx] [PATCH 05/21 v2] drm/i915: Initialize skylake scalers
Konduru, Chandra
chandra.konduru at intel.com
Wed Mar 25 09:56:42 PDT 2015
> -----Original Message-----
> From: Roper, Matthew D
> Sent: Tuesday, March 24, 2015 10:14 PM
> To: Konduru, Chandra
> Cc: intel-gfx at lists.freedesktop.org; Vetter, Daniel; Conselvan De Oliveira, Ander
> Subject: Re: [PATCH 05/21 v2] drm/i915: Initialize skylake scalers
>
> On Fri, Mar 20, 2015 at 05:04:26PM -0700, Chandra Konduru wrote:
> > Initializing scalers with supported values during crtc init.
> >
> > v2:
> > -initialize single copy of min/max values (Matt)
> >
> > Signed-off-by: Chandra Konduru <chandra.konduru at intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_display.c | 53
> ++++++++++++++++++++++++++++++++++
> > 1 file changed, 53 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 89299b6..e6ea9e0 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -103,6 +103,8 @@ static void chv_prepare_pll(struct intel_crtc *crtc,
> > const struct intel_crtc_state *pipe_config); static
> void
> > intel_begin_crtc_commit(struct drm_crtc *crtc); static void
> > intel_finish_crtc_commit(struct drm_crtc *crtc);
> > +static void skl_init_scalers(struct drm_device *dev, int pipe,
> > + struct intel_crtc_state *crtc_state);
> >
> > static struct intel_encoder *intel_find_encoder(struct
> > intel_connector *connector, int pipe) { @@ -12750,6 +12752,54 @@
> > static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev,
> > return &cursor->base;
> > }
> >
> > +static void skl_init_scalers(struct drm_device *dev, int pipe,
> > + struct intel_crtc_state *crtc_state) {
> > + int i;
> > + struct intel_scaler *intel_scaler;
> > + struct intel_crtc_scaler_state *scaler_state = &crtc_state->scaler_state;
> > + if (INTEL_INFO(dev)->gen < 9)
> > + return;
>
> It's probably better to move this guard out to the callsite so that we can more
> easily extend this for future platforms. Unless you plan to just extend this
> function in the future, in which case we should probably drop the 'skl_' prefix.
That is a slip. Will move the check to callsite and send out update.
>
>
> Matt
>
> > +
> > + scaler_state->num_scalers = SKL_NUM_SCALERS;
> > + for (i = 0; i < SKL_NUM_SCALERS; i++) {
> > + intel_scaler = &scaler_state->scalers[i];
> > + intel_scaler->in_use = 0;
> > + intel_scaler->id = i;
> > +
> > + intel_scaler->mode = PS_SCALER_MODE_DYN;
> > + intel_scaler->filter = PS_FILTER_MEDIUM;
> > + }
> > +
> > + /* down scaling ratio: 2.99 --> 1, i.e., 34% of original */
> > + scaler_state->min_hsr = 34;
> > + scaler_state->min_vsr = 34;
> > + scaler_state->max_hsr = 500;
> > + scaler_state->max_vsr = 500;
> > +
> > + /* down scaling ratio: 2.99x2.99 --> 1x1, i.e., 12% of original */
> > + scaler_state->min_hvsr = 12;
> > + scaler_state->max_hvsr = 2500;
> > +
> > + /* src_w & dst_w range 8 - 4096 */
> > + scaler_state->min_src_w = 8;
> > + scaler_state->max_src_w = 4096;
> > + scaler_state->min_dst_w = 8;
> > + scaler_state->max_dst_w = 4096;
> > +
> > + /* src_h & dst_h range 8 - 2304 */
> > + scaler_state->min_src_h = 8;
> > + scaler_state->max_src_h = 2304;
> > + scaler_state->min_dst_h = 8;
> > + scaler_state->max_dst_h = 2304;
> > +
> > + /* pipe C has one scaler */
> > + if (pipe == PIPE_C) {
> > + scaler_state->num_scalers = 1;
> > + }
> > + scaler_state->scaler_id = -1;
> > +}
> > +
> > static void intel_crtc_init(struct drm_device *dev, int pipe) {
> > struct drm_i915_private *dev_priv = dev->dev_private; @@ -12769,6
> > +12819,9 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
> > intel_crtc_set_state(intel_crtc, crtc_state);
> > crtc_state->base.crtc = &intel_crtc->base;
> >
> > + /* initialize shared scalers */
> > + skl_init_scalers(dev, pipe, crtc_state);
> > +
> > primary = intel_primary_plane_create(dev, pipe);
> > if (!primary)
> > goto fail;
> > --
> > 1.7.9.5
> >
>
> --
> Matt Roper
> Graphics Software Engineer
> IoTG Platform Enabling & Development
> Intel Corporation
> (916) 356-2795
More information about the Intel-gfx
mailing list