[Intel-gfx] [PATCH 1/5] i965/skl: Add macros for Yf/Ys tiling formats

[Anuj Phogat]

Signed-off-by: Anuj Phogat <anuj.phogat at gmail.com>
---
 include/drm/i915_drm.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index ded43b1..a6c167c 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -842,6 +842,8 @@ struct drm_i915_gem_caching {
 #define I915_TILING_NONE	0
 #define I915_TILING_X		1
 #define I915_TILING_Y		2
+#define I915_TILING_YF          3
+#define I915_TILING_YS          4
 
 #define I915_BIT_6_SWIZZLE_NONE		0
 #define I915_BIT_6_SWIZZLE_9		1
-- 
2.3.4