[Intel-gfx] [PATCH 3/5] i965/skl: Set tile width and height for YF/YS tiling

[Tvrtko Ursulin]

Hi,

On 03/30/2015 10:00 PM, Anuj Phogat wrote:
> I'm still passing tiling=I915_TILING_Y in drm_intel_gem_bo_alloc_internal()
> in case of YF/YS tiling. Passing tiling=I915_TILING_{YF,YS} causes bo
> allocation failure. Any advice what's the right thing to do here?

Officially approved idea is to pass I915_TILING_NONE to the kernel since 
it doesn't need to know. (It is not possible to map Yf/Ys into GTT for 
de-tiling.)

Regards,

Tvrtko