[Intel-gfx] [PATCH 01/19] drm/i915: Return more precise cdclk for gen2/3

Damien Lespiau damien.lespiau at intel.com
Tue Mar 31 06:10:10 PDT 2015


On Tue, Mar 31, 2015 at 02:09:47PM +0300, Mika Kahola wrote:
> Fill out the lower three digits for gen2 and gen3 cdclk frqeuncy. It's
> not clear if these are accurate frquencies or just in the ballpark, but
> without docs this is the best we can do.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Mika Kahola <mika.kahola at intel.com>

Reviewed-by: Damien Lespiau <damien.lespiau at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_display.c | 22 +++++++++++-----------
>  1 file changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a693129..2bf960f 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5893,7 +5893,7 @@ static int i945_get_display_clock_speed(struct drm_device *dev)
>  
>  static int i915_get_display_clock_speed(struct drm_device *dev)
>  {
> -	return 333000;
> +	return 333333;
>  }
>  
>  static int i9xx_misc_get_display_clock_speed(struct drm_device *dev)
> @@ -5909,19 +5909,19 @@ static int pnv_get_display_clock_speed(struct drm_device *dev)
>  
>  	switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
>  	case GC_DISPLAY_CLOCK_267_MHZ_PNV:
> -		return 267000;
> +		return 266667;
>  	case GC_DISPLAY_CLOCK_333_MHZ_PNV:
> -		return 333000;
> +		return 333333;
>  	case GC_DISPLAY_CLOCK_444_MHZ_PNV:
> -		return 444000;
> +		return 444444;
>  	case GC_DISPLAY_CLOCK_200_MHZ_PNV:
>  		return 200000;
>  	default:
>  		DRM_ERROR("Unknown pnv display core clock 0x%04x\n", gcfgc);
>  	case GC_DISPLAY_CLOCK_133_MHZ_PNV:
> -		return 133000;
> +		return 133333;
>  	case GC_DISPLAY_CLOCK_167_MHZ_PNV:
> -		return 167000;
> +		return 166667;
>  	}
>  }
>  
> @@ -5932,11 +5932,11 @@ static int i915gm_get_display_clock_speed(struct drm_device *dev)
>  	pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
>  
>  	if (gcfgc & GC_LOW_FREQUENCY_ENABLE)
> -		return 133000;
> +		return 133333;
>  	else {
>  		switch (gcfgc & GC_DISPLAY_CLOCK_MASK) {
>  		case GC_DISPLAY_CLOCK_333_MHZ:
> -			return 333000;
> +			return 333333;
>  		default:
>  		case GC_DISPLAY_CLOCK_190_200_MHZ:
>  			return 190000;
> @@ -5946,7 +5946,7 @@ static int i915gm_get_display_clock_speed(struct drm_device *dev)
>  
>  static int i865_get_display_clock_speed(struct drm_device *dev)
>  {
> -	return 266000;
> +	return 266667;
>  }
>  
>  static int i855_get_display_clock_speed(struct drm_device *dev)
> @@ -5962,7 +5962,7 @@ static int i855_get_display_clock_speed(struct drm_device *dev)
>  	case GC_CLOCK_166_250:
>  		return 250000;
>  	case GC_CLOCK_100_133:
> -		return 133000;
> +		return 133333;
>  	}
>  
>  	/* Shouldn't happen */
> @@ -5971,7 +5971,7 @@ static int i855_get_display_clock_speed(struct drm_device *dev)
>  
>  static int i830_get_display_clock_speed(struct drm_device *dev)
>  {
> -	return 133000;
> +	return 133333;
>  }
>  
>  static void
> -- 
> 1.9.1
> 
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