[Intel-gfx] [PATCH 06/19] drm/i915: Assume 400MHz cdclk for the rest of gen4-7

[Damien Lespiau]

On Tue, Mar 31, 2015 at 02:11:56PM +0300, Mika Kahola wrote:
> We don't currently have cdclk extraction code for 965g,snb,ivb.
> Let's assume 400 MHz until we know better. That seems to match hints
> in various vague documents. Whether that's good enough is not
> entirely clear.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Mika Kahola <mika.kahola at intel.com>
> ---

Acked-by: Damien Lespiau <damien.lespiau at intel.com>

>  drivers/gpu/drm/i915/intel_display.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 5df9c47..4a4fdb0 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13705,7 +13705,8 @@ static void intel_init_display(struct drm_device *dev)
>  	else if (IS_G33(dev) || IS_G4X(dev))
>  		dev_priv->display.get_display_clock_speed =
>  			g33_get_display_clock_speed;
> -	else if (IS_I945G(dev))
> +	else if (IS_I945G(dev) || IS_BROADWATER(dev) ||
> +		 IS_GEN6(dev) || IS_IVYBRIDGE(dev))
>  		dev_priv->display.get_display_clock_speed =
>  			i945_get_display_clock_speed;
>  	else if (IS_I915G(dev))
> -- 
> 1.9.1
> 
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