[Intel-gfx] [PATCH] Revert "drm/i915: Performed deferred clflush inside set-cache-level"

[Sudip Mukherjee]

This reverts commit <0f71979ab7fbd0c71c41c2798de3d33937915434>.

my display was getting garbled for a moment very frequently. it looked
like when the screen was getting refreshed then something was going
wrong.
git bisect gave this as the first bad commit, and after reverting it
now display is not having that problem.

Signed-off-by: Sudip Mukherjee <sudip at vectorindia.org>
---

my system is x86_64.
lspci -k gives:
"VGA compatible controller: Intel Corporation Xeon E3-1200 v2/3rd Gen Core processor Graphics Controller (rev 09)
Subsystem: Foxconn International, Inc. Device 0d74
Kernel driver in use: i915"

This is my bisect log:
# bad: [e42391cd048809d903291d07f86ed3934ce138e9] Linux 4.0-rc6
# good: [b7392d2247cfe6771f95d256374f1a8e6a6f48d6] Linux 3.19-rc2
git bisect start 'v4.0-rc6' 'v3.19-rc2' '--' 'drivers/gpu/drm/i915/'
# good: [d2182a660808d9053a605e3ebc8c46a323ec6e5d] drm/i915: Don't register HDMI connectors for eDP ports on VLV/CHV
git bisect good d2182a660808d9053a605e3ebc8c46a323ec6e5d
# bad: [36d21f4c557a2b18ed7c9d254060d4ca07a6c5c7] drm/i915/dsi: remove unnecessary dsi device callbacks
git bisect bad 36d21f4c557a2b18ed7c9d254060d4ca07a6c5c7
# good: [72f95afa5faaf899f7344879b6ccd5f0cb271b28] drm/i915: Removed duplicate members from submit_request
git bisect good 72f95afa5faaf899f7344879b6ccd5f0cb271b28
# good: [2844a9214759901f382086644842e39ad6f7d894] drm/i915: Use pipe_name() in the get_plane_config() functions
git bisect good 2844a9214759901f382086644842e39ad6f7d894
# bad: [1b842c89bd8eb0e9619e1aba071c9a5529b7a179] drm/i915: Fix kzalloc() smatch warnings in get_initial_plane_config()
git bisect bad 1b842c89bd8eb0e9619e1aba071c9a5529b7a179
# good: [8d360dffd6d8634868e433128d5178bea14cc42c] drm/i915: Specify bsd rings through exec flag
git bisect good 8d360dffd6d8634868e433128d5178bea14cc42c
# good: [1197b4f230fb7c8fe3a9b549596fe130b09a0db2] drm/i915: Balance context pinning on reset cleanup
git bisect good 1197b4f230fb7c8fe3a9b549596fe130b09a0db2
# bad: [0f71979ab7fbd0c71c41c2798de3d33937915434] drm/i915: Performed deferred clflush inside set-cache-level
git bisect bad 0f71979ab7fbd0c71c41c2798de3d33937915434
# good: [a7cbedec8317a5cacecb567674fdbc1c3fb22de8] drm/i915: Rename unpin_count to pin_count
git bisect good a7cbedec8317a5cacecb567674fdbc1c3fb22de8

 drivers/gpu/drm/i915/i915_drv.h |  1 -
 drivers/gpu/drm/i915/i915_gem.c | 31 ++++++++++++++++++++++---------
 2 files changed, 22 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8727086..abe6c16 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2054,7 +2054,6 @@ struct drm_i915_gem_object {
 	 */
 	unsigned long gt_ro:1;
 	unsigned int cache_level:3;
-	unsigned int cache_dirty:1;
 
 	unsigned int has_dma_mapping:1;
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 27ea6bd..e9341e9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3647,14 +3647,11 @@ i915_gem_clflush_object(struct drm_i915_gem_object *obj,
 	 * snooping behaviour occurs naturally as the result of our domain
 	 * tracking.
 	 */
-	if (!force && cpu_cache_is_coherent(obj->base.dev, obj->cache_level)) {
-		obj->cache_dirty = true;
+	if (!force && cpu_cache_is_coherent(obj->base.dev, obj->cache_level))
 		return false;
-	}
 
 	trace_i915_gem_object_clflush(obj);
 	drm_clflush_sg(obj->pages);
-	obj->cache_dirty = false;
 
 	return true;
 }
@@ -3836,11 +3833,27 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
 		vma->node.color = cache_level;
 	obj->cache_level = cache_level;
 
-	if (obj->cache_dirty &&
-	    obj->base.write_domain != I915_GEM_DOMAIN_CPU &&
-	    cpu_write_needs_clflush(obj)) {
-		if (i915_gem_clflush_object(obj, true))
-			i915_gem_chipset_flush(obj->base.dev);
+	if (cpu_write_needs_clflush(obj)) {
+		u32 old_read_domains, old_write_domain;
+
+		/* If we're coming from LLC cached, then we haven't
+		 * actually been tracking whether the data is in the
+		 * CPU cache or not, since we only allow one bit set
+		 * in obj->write_domain and have been skipping the clflushes.
+		 * Just set it to the CPU cache for now.
+		 */
+		i915_gem_object_retire(obj);
+		WARN_ON(obj->base.write_domain & ~I915_GEM_DOMAIN_CPU);
+
+		old_read_domains = obj->base.read_domains;
+		old_write_domain = obj->base.write_domain;
+
+		obj->base.read_domains = I915_GEM_DOMAIN_CPU;
+		obj->base.write_domain = I915_GEM_DOMAIN_CPU;
+
+		trace_i915_gem_object_change_domain(obj,
+						    old_read_domains,
+						    old_write_domain);
 	}
 
 	return 0;
-- 
1.8.1.2