[Intel-gfx] [PATCH v4 0/8] Enable DC states for skl.

[Daniel Vetter]

On Thu, Apr 16, 2015 at 02:22:06PM +0530, Animesh Manna wrote:
> v4:
> - Removed all warning by reordering the patchsets.
> - Changed the dmc firmware file name skl_dmc_ver1.bin, followed naming conventipon as <platform>_dmc_<api-version>.bin
> 
> v3:
> MOdified the code of patch 1 and 3 based on review commets. 
> 
> v2:
> Based on review comments modified the code.
> 
> v1:
> Initial version send as RFC.
> 
> This patch series contains the implementation for enabling DC states for gen9 
> platform, specifically for skl. Few bxt specific changes will be submitted 
> separately in a different patch series which will be extended support for bxt 
> and will use major portion of the code of this patch series.
> 
> A.Sunil Kamath (3):
>   drm/i915/skl: Add support to load SKL CSR firmware.
>   drm/i915/skl: Implement enable/disable for Display C5 state.
>   Implement enable/disable for Display C6 state.
> 
> Suketu Shah (5):
>   drm/i915/skl: Add DC5 Trigger Sequence.
>   drm/i915/skl: Assert the requirements to enter or exit DC5.
>   drm/i915/skl: Add DC6 Trigger sequence.
>   drm/i915/skl: Assert the requirements to enter or exit DC6.
>   drm/i915/skl: Enable runtime PM

Ok I pulled in the entire series. A bunch of follow-up refactoring patches
are imo required for polish, plus two more things overall I've spotted:
- intel_csr.c is lacking kerneldoc for public functions, plus a high-level
  text about how the firmware loading interacts with everything else might
  be good.
- dev_priv->csr_lock doesn't document what exactly it protects and looks a
  lot like cargo-culting - it seems to abuse locking for enforcing
  ordering, which rarely works out well. But that was just a very cursory
  look, I might be mistaken.

Thanks, Daniel


> 
>  drivers/gpu/drm/i915/Makefile           |   3 +-
>  drivers/gpu/drm/i915/i915_dma.c         |  11 +-
>  drivers/gpu/drm/i915/i915_drv.c         |  50 ++++
>  drivers/gpu/drm/i915/i915_drv.h         |  27 +-
>  drivers/gpu/drm/i915/i915_reg.h         |  11 +
>  drivers/gpu/drm/i915/intel_csr.c        | 421 ++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_drv.h        |   9 +
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 199 ++++++++++++++-
>  8 files changed, 726 insertions(+), 5 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_csr.c
> 
> -- 
> 2.0.2
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch