[Intel-gfx] [PATCH 1/3] drm/i915: Sink rate read should be saved in deca-kHz

[Sonika Jindal]

The sink rate read from supported link rate table is in KHz as per spec
while in drm, the saved clock is in deca-KHz. So divide the link rate by
10 before storing.

Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Signed-off-by: Sonika Jindal <sonika.jindal at intel.com>
---
Just resending it along with the other intermediate link rate patches
(It was posted orginally on 21st April)

Thanks,
Sonika

 drivers/gpu/drm/i915/intel_dp.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index bacdec5..6bd5afb 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3906,7 +3906,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
 			if (val == 0)
 				break;
 
-			intel_dp->sink_rates[i] = val * 200;
+			/* Value read is in kHz while drm clock is saved in deca-kHz */
+			intel_dp->sink_rates[i] = (val * 200) / 10;
 		}
 		intel_dp->num_sink_rates = i;
 	}
-- 
1.7.10.4