[Intel-gfx] [PATCH v4] [i-g-t] tests/gem_ppgtt: Check for vm leaks with flink and ppgtt

[Daniel Vetter]

On Wed, May 06, 2015 at 03:01:30PM +0100, daniele.ceraolospurio at intel.com wrote:
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> 
> Using imported objects should not leak i915 vmas (and vms).
> 
> In practice this simulates Xorg importing fbcon and leaking (or not) one vma
> per Xorg startup cycle.
> 
> v2: use low-level ioctl wrappers and bo offset to check the leak (Chris)
> v3: use the flinked bo as batch (Chris)
> v4: add check on offset, remove unneeded  assignments (Chris)
> 
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com> (v2+)
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Applied, thanks.
-Daniel

> ---
>  tests/gem_ppgtt.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 73 insertions(+)
> 
> diff --git a/tests/gem_ppgtt.c b/tests/gem_ppgtt.c
> index 5bf773c..d1e484a 100644
> --- a/tests/gem_ppgtt.c
> +++ b/tests/gem_ppgtt.c
> @@ -48,6 +48,22 @@
>  #define HEIGHT 512
>  #define SIZE (HEIGHT*STRIDE)
>  
> +static bool uses_full_ppgtt(int fd)
> +{
> +	struct drm_i915_getparam gp;
> +	int val = 0;
> +
> +	memset(&gp, 0, sizeof(gp));
> +	gp.param = 18; /* HAS_ALIASING_PPGTT */
> +	gp.value = &val;
> +
> +	if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp))
> +		return 0;
> +
> +	errno = 0;
> +	return val > 1;
> +}
> +
>  static drm_intel_bo *create_bo(drm_intel_bufmgr *bufmgr,
>  			       uint32_t pixel)
>  {
> @@ -200,6 +216,60 @@ static void surfaces_check(dri_bo **bo, int count, uint32_t expected)
>  	}
>  }
>  
> +static uint64_t exec_and_get_offset(int fd, uint32_t batch)
> +{
> +	struct drm_i915_gem_execbuffer2 execbuf;
> +	struct drm_i915_gem_exec_object2 exec[1];
> +	uint32_t batch_data[2] = { MI_BATCH_BUFFER_END };
> +
> +	gem_write(fd, batch, 0, batch_data, sizeof(batch_data));
> +
> +	memset(exec, 0, sizeof(exec));
> +	exec[0].handle = batch;
> +
> +	memset(&execbuf, 0, sizeof(execbuf));
> +	execbuf.buffers_ptr = (uintptr_t)exec;
> +	execbuf.buffer_count = 1;
> +
> +	gem_execbuf(fd, &execbuf);
> +	igt_assert_neq(exec[0].offset, -1);
> +
> +	return exec[0].offset;
> +}
> +
> +static void flink_and_close(void)
> +{
> +	uint32_t fd, fd2;
> +	uint32_t bo, flinked_bo, new_bo, name;
> +	uint64_t offset, offset_new;
> +
> +	fd = drm_open_any();
> +	igt_require(uses_full_ppgtt(fd));
> +
> +	bo = gem_create(fd, 4096);
> +	name = gem_flink(fd, bo);
> +
> +	fd2 = drm_open_any();
> +
> +	flinked_bo = gem_open(fd2, name);
> +	offset = exec_and_get_offset(fd2, flinked_bo);
> +	gem_sync(fd2, flinked_bo);
> +	gem_close(fd2, flinked_bo);
> +
> +	/* the flinked bo VMA should have been cleared now, so a new bo of the
> +	 * same size should get the same offset
> +	 */
> +	new_bo = gem_create(fd2, 4096);
> +	offset_new = exec_and_get_offset(fd2, new_bo);
> +	gem_close(fd2, new_bo);
> +
> +	igt_assert_eq(offset, offset_new);
> +
> +	gem_close(fd, bo);
> +	close(fd);
> +	close(fd2);
> +}
> +
>  #define N_CHILD 8
>  int main(int argc, char **argv)
>  {
> @@ -229,5 +299,8 @@ int main(int argc, char **argv)
>  		surfaces_check(rcs, N_CHILD, 0x8000 / N_CHILD);
>  	}
>  
> +	igt_subtest("flink-and-close-vma-leak")
> +		flink_and_close();
> +
>  	igt_exit();
>  }
> -- 
> 1.9.1
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch