[Intel-gfx] [PATCH] drm/i915: Unconditionally flush writes before execbuffer

[Chris Wilson]

On Mon, May 11, 2015 at 12:34:37PM +0200, Daniel Vetter wrote:
> On Mon, May 11, 2015 at 08:51:36AM +0100, Chris Wilson wrote:
> > With the advent of mmap(wc), we have a path to write directly into
> > active GPU buffers. When combined with async updates (i.e. avoiding the
> > explicit domain management along with the memory barriers and GPU
> > stalls) we start to see the GPU read the wrong values from memory - i.e.
> > we have insufficient memory barriers along the execbuffer path. Writes
> > through the GTT should have been naturally serialised with execution
> > through the GTT as well and so the impact only seems to be from the WC
> > paths.
> > 
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Akash Goel <akash.goel at intel.com>
> > Cc: stable at vger.kernel.org
> 
> Do we have a nasty igt for this? Bugzilla?

I've added igt/gem_streaming_writes.

That wmb() is not enough for !llc. Since the wmb() made piglit happy it
is quite possible I haven't hit the same path exactly, but it's going to
take some investigation to see if igt/gem_streaming_writes can possibly
work on !llc.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre