[Intel-gfx] [PATCH 1/2] drm/i915/hsw/bdw: Expose I915_EXEC_RESOURCE_STREAMER flag
Chris Wilson
chris at chris-wilson.co.uk
Tue May 12 02:49:02 PDT 2015
On Mon, May 11, 2015 at 12:01:11PM +0300, Abdiel Janulgue wrote:
> Ensures that the batch buffer is executed by the resource streamer
>
> Signed-off-by: Abdiel Janulgue <abdiel.janulgue at linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 15 +++++++++++++++
> drivers/gpu/drm/i915/intel_ringbuffer.h | 1 +
> include/uapi/drm/i915_drm.h | 7 ++++++-
> 3 files changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index a3190e79..afbd3c16 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -1474,6 +1474,21 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data,
> } else
> ring = &dev_priv->ring[(args->flags & I915_EXEC_RING_MASK) - 1];
>
> + if (args->flags & I915_EXEC_RESOURCE_STREAMER) {
> + if (!IS_HASWELL(dev) && INTEL_INFO(dev)->gen < 8) {
> + DRM_DEBUG("RS is only allowed for Haswell, Gen8 "
> + "and above\n");
> + return -EINVAL;
> + }
> + if (ring->id != RCS) {
> + DRM_DEBUG("RS is not available on %s)\n",
> + ring->name);
> + return -EINVAL;
> + }
> +
> + dispatch_flags |= I915_DISPATCH_RS;
> + }
> +
> if (!intel_ring_initialized(ring)) {
Please don't split the conversion from args->flags to ring from its
subsequent EINVAL check.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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