[Intel-gfx] [PATCH 4/4] drm/i915: Changes required to enable DSI Video Mode on CHT
shuang.he at intel.com
shuang.he at intel.com
Thu May 14 08:47:02 PDT 2015
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 6391
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -3 272/272 269/272
ILK -1 302/302 301/302
SNB -1 315/315 314/315
IVB 343/343 343/343
BYT 287/287 287/287
BDW 317/317 317/317
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*PNV igt at gem_tiled_pread_pwrite PASS(3) FAIL(1)
*PNV igt at gem_userptr_blits@coherency-sync PASS(3) CRASH(1)
*PNV igt at gem_userptr_blits@coherency-unsync PASS(3) CRASH(1)
*ILK igt at kms_flip@flip-vs-dpms-interruptible PASS(2) DMESG_WARN(1)
(dmesg patch applied)drm:intel_pch_fifo_underrun_irq_handler[i915]]*ERROR*PCH_transcoder_A_FIFO_underrun at PCH transcoder A FIFO underrun
SNB igt at pm_rpm@dpms-mode-unset-non-lpsp DMESG_WARN(7)PASS(1) DMESG_WARN(1)
(dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_uncore.c:#assert_device_not_suspended[i915]()@WARNING:.* at .* assert_device_not_suspended+0x
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