[Intel-gfx] [PATCH] drm/i915: Don't overwrite (e)DP PLL selection on SKL
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Fri May 15 03:59:41 PDT 2015
Hi,
On 05/15/2015 11:34 AM, Ander Conselvan de Oliveira wrote:
> In the following commit, the place where the contents of dpll_hw_state
> in crtc_state where zeroed was changed. Prior to that commit, it
> happened when the new state was allocated, but now that happens just
> before the call the .crtc_compute_clock() hook. The DP code for SKL,
> however, sets up the (private) PLL in the encoder compute config
> function that has already run by the time that memset() is reached,
> causing the previous value to be lost.
>
> This patch fixes the issue by moving the memset() down the call chain,
> so that it is only called if the values in dpll_hw_state are going to be
> updated.
>
> commit 4978cc93d9ac240b435ce60431aef24239b4c270
> Author: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira at intel.com>
> Date: Tue Apr 21 17:13:21 2015 +0300
>
> drm/i915: Preserve shared DPLL information in new pipe_config
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90462
> ---
I gave it a quick spin - it does fix the warnings on my system.
Regards,
Tvrtko
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