[Intel-gfx] [PATCH 4/4] drm/i915/skl: enable WaForceContextSaveRestoreNonCoherent

[Imre Deak]

On ti, 2015-05-19 at 16:08 +0300, Mika Kuoppala wrote:
> Imre Deak <imre.deak at intel.com> writes:
> 
> > Signed-off-by: Imre Deak <imre.deak at intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_ringbuffer.c | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > index 2e342db..0d1522f 100644
> > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> > @@ -973,6 +973,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
> >  		WA_SET_BIT_MASKED(GEN7_HALF_SLICE_CHICKEN1,
> >  			       GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
> >  
> > +	/* WaForceContextSaveRestoreNonCoherent:skl,bxt */
> > +	WA_SET_BIT_MASKED(HDC_CHICKEN0,
> > +			  HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT);
> > +
> 
> I think we need to also set bit 15 as it looks to be master switch
> for this bit.

Yes, thanks for catching it.

--Imre