[Intel-gfx] [PATCH] drm/i915: limit PPGTT size to 2GB in 32-bit platforms

[Michel Thierry]

We already set this limit for the GGTT.

This is a temporary patch until a full replacement of size_t variables
(inadequate in 32-bit kernel) is in place.

Regression from:
	commit a4e0bedca678c81eea4cd79a4bd502335639f73a
	Author: Michel Thierry <michel.thierry at intel.com>
	Date:   Wed Apr 8 12:13:35 2015 +0100

		drm/i915: Use complete address space in true PPGTT

Suggested-by: Daniel Vetter <daniel.vetter at ffwll.ch>
Cc: Mika Kuoppala <mika.kuoppala at intel.com>
Signed-off-by: Michel Thierry <michel.thierry at intel.com>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 17b7df0..ffecb87 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -951,7 +951,15 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
 	gen8_initialize_pd(&ppgtt->base, ppgtt->scratch_pd);
 
 	ppgtt->base.start = 0;
+
+#ifdef CONFIG_X86_32
+	/* Limit 32b platforms to GGTT size (2GB) */
+	struct drm_i915_private *dev_priv = ppgtt->base.dev->dev_private;
+
+	ppgtt->base.total = dev_priv->gtt.base.total;
+#else
 	ppgtt->base.total = 1ULL << 32;
+#endif
 	ppgtt->base.cleanup = gen8_ppgtt_cleanup;
 	ppgtt->base.allocate_va_range = gen8_alloc_va_range;
 	ppgtt->base.insert_entries = gen8_ppgtt_insert_entries;
-- 
2.4.0