[Intel-gfx] [PATCH v4 05/12] drm/i915: Cache current cdclk frequency in dev_priv

[Damien Lespiau]

On Fri, May 22, 2015 at 11:22:35AM +0300, Mika Kahola wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Rather that extracting the current cdclk freuqncy every time someone
> wants to know it, cache the current value and use that. VLV/CHV already
> stored a cached value there so just expand that to cover all platforms.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> v2: Rebased to the latest
> v3: Rebased to the latest
> 
> Reviewed-by: Mika Kahola <mika.kahola at intel.com>
> 
> Author:    Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 25 ++++++++++++++++++-------
>  static int valleyview_calc_cdclk(struct drm_i915_private *dev_priv,
> @@ -5850,6 +5857,8 @@ static void valleyview_modeset_global_resources(struct drm_atomic_state *old_sta
>  
>  		intel_display_power_put(dev_priv, POWER_DOMAIN_PIPE_A);
>  	}
> +
> +	intel_update_cdclk(dev);
>  }

This ones looks like a spurious one to me.

-- 
Damien