[Intel-gfx] [PATCH 7/7] drm/i915/bxt: clear hpd status sticky bits earlier

Paulo Zanoni przanoni at gmail.com
Thu May 28 12:31:20 PDT 2015


2015-05-28 9:43 GMT-03:00 Jani Nikula <jani.nikula at intel.com>:
> The hotplug status is cached in hp_control, and will be passed on to
> bottom halves through intel_hpd_irq_handler(), so we can clear the
> sticky bits earlier.
>
> While at it, drop the redundant logging of the hotplug status, which
> will also be logged by pch_get_hpd_pins().
>

Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 14 ++------------
>  1 file changed, 2 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index d401c863aeee..e4260b0924f1 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2241,21 +2241,11 @@ static void bxt_hpd_handler(struct drm_device *dev, uint32_t iir_status)
>                 return;
>         }
>
> -       DRM_DEBUG_DRIVER("hotplug event received, stat 0x%08x\n",
> -               hp_control & BXT_HOTPLUG_CTL_MASK);
> +       /* Clear sticky bits in hpd status */
> +       I915_WRITE(BXT_HOTPLUG_CTL, hp_control);
>
> -       /* Check for HPD storm and schedule bottom half */
>         pch_get_hpd_pins(&pin_mask, &long_mask, hp_trigger, hp_control, hpd_bxt);
>         intel_hpd_irq_handler(dev, pin_mask, long_mask);
> -
> -       /*
> -        * FIXME: Save the hot plug status for bottom half before
> -        * clearing the sticky status bits, else the status will be
> -        * lost.
> -        */
> -
> -       /* Clear sticky bits in hpd status */
> -       I915_WRITE(BXT_HOTPLUG_CTL, hp_control);
>  }
>
>  static irqreturn_t gen8_irq_handler(int irq, void *arg)
> --
> 2.1.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Paulo Zanoni


More information about the Intel-gfx mailing list