[Intel-gfx] [PATCH v2 4/7] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround

[Arun Siluvery]

In Indirect and Per context w/a batch buffer,
+WaDisableCtxRestoreArbitration

Signed-off-by: Rafael Barbalho <rafael.barbalho at intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com>
---
 drivers/gpu/drm/i915/intel_lrc.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index ee968e1..8ed6433 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1121,7 +1121,6 @@ create_wa_bb(struct intel_engine_cs *ring, uint32_t bb_size)
 static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring,
 				    struct intel_context *ctx)
 {
-	int i;
 	struct intel_ringbuffer *ringbuf = NULL;
 
 	ringbuf = create_wa_bb(ring, PAGE_SIZE);
@@ -1130,10 +1129,11 @@ static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring,
 
 	ctx->indirect_ctx_wa_bb = ringbuf;
 
-	/* FIXME: fill one cache line with NOOPs.
-	 * Replace these instructions with WA
-	 */
-	for (i = 0; i < 16; ++i)
+	/* WaDisableCtxRestoreArbitration:bdw,chv */
+	intel_logical_ring_emit(ringbuf, MI_ARB_ON_OFF | MI_ARB_DISABLE);
+
+	/* padding */
+	while (((unsigned long) ringbuf->tail % CACHELINE_BYTES) != 0)
 		intel_logical_ring_emit(ringbuf, MI_NOOP);
 
 	/*
@@ -1156,8 +1156,11 @@ static int gen8_init_perctx_bb(struct intel_engine_cs *ring,
 
 	ctx->per_ctx_wa_bb = ringbuf;
 
-	/* FIXME: Replace these instructions with WA */
-	for (i = 0; i < 15; ++i)
+	/* WaDisableCtxRestoreArbitration:bdw,chv */
+	intel_logical_ring_emit(ringbuf, MI_ARB_ON_OFF | MI_ARB_ENABLE);
+
+	/* padding */
+	for (i = 0; i < 14; ++i)
 		intel_logical_ring_emit(ringbuf, MI_NOOP);
 
 	intel_logical_ring_emit(ringbuf, MI_BATCH_BUFFER_END);
-- 
2.3.0