[Intel-gfx] [PATCH] drm/i915/bxt: Fix eDP panel fitting
Matt Roper
matthew.d.roper at intel.com
Tue Nov 3 18:29:41 PST 2015
BXT CRTC scaling uses the same gen9 codepaths as SKL; these codepaths
store panel fitter information in pipe_config->pch_pfit. However since
HAS_PCH_SPLIT() is false for BXT we never actually wind up filling in
this structure (we wind up filling in pipe_config->gmch_pfit instead,
which is ignored when we go to program the hardware). Make sure we
always take the PCH code path on gen9+ platforms.
Cc: Imre Deak <imre.deak at intel.com>
Cc: Chandra Konduru <chandra.konduru at intel.com>
Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
---
Not a regression as far as I know; I believe this has been broken since BXT
support was added to the driver.
drivers/gpu/drm/i915/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1cb1f3f..a8bbc2d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1426,7 +1426,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
return ret;
}
- if (!HAS_PCH_SPLIT(dev))
+ if (!HAS_PCH_SPLIT(dev) && INTEL_INFO(dev)->gen < 9)
intel_gmch_panel_fitting(intel_crtc, pipe_config,
intel_connector->panel.fitting_mode);
else
--
2.1.4
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