[Intel-gfx] [PATCH 4/8] drm/i915: Add a modeset power domain
Patrik Jakobsson
patrik.r.jakobsson at gmail.com
Wed Nov 4 11:56:51 PST 2015
On Wed, Nov 4, 2015 at 6:29 PM, Ville Syrjälä
<ville.syrjala at linux.intel.com> wrote:
> On Tue, Nov 03, 2015 at 01:31:10PM +0100, Patrik Jakobsson wrote:
>> We need DC5/DC6 to be disabled around modesets to prevent confusing the
>> DMC. Also, we've run out of bits in the 32 bit power domain mask so now
>> it's a 64 bit mask.
>
> We could get back 4 bits by squashing each 2 and 4 lane DDI power doamin
> into just one power domain. I don't think we use the 2 vs. 4 lane
> distinciton anywhere. It was basically added for VLV but turns it it
> can't be used there, so I think we could just get rid of it.
Good idea. I can't see that we're making a distinction anywhere either.
>
>>
>> Signed-off-by: Patrik Jakobsson <patrik.jakobsson at linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_debugfs.c | 2 ++
>> drivers/gpu/drm/i915/i915_drv.h | 3 ++-
>> drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
>> 3 files changed, 5 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
>> index f7b85fe..ae9a2ed 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -2746,6 +2746,8 @@ static const char *power_domain_str(enum intel_display_power_domain domain)
>> return "AUX_D";
>> case POWER_DOMAIN_GMBUS:
>> return "GMBUS";
>> + case POWER_DOMAIN_MODESET:
>> + return "MODESET";
>> case POWER_DOMAIN_INIT:
>> return "INIT";
>> default:
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index c3d3b2a..efb6a00 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -200,6 +200,7 @@ enum intel_display_power_domain {
>> POWER_DOMAIN_AUX_C,
>> POWER_DOMAIN_AUX_D,
>> POWER_DOMAIN_GMBUS,
>> + POWER_DOMAIN_MODESET,
>> POWER_DOMAIN_INIT,
>>
>> POWER_DOMAIN_NUM,
>> @@ -1226,7 +1227,7 @@ struct i915_power_well {
>> int count;
>> /* cached hw enabled state */
>> bool hw_enabled;
>> - unsigned long domains;
>> + unsigned long long domains;
>> unsigned long data;
>> const struct i915_power_well_ops *ops;
>> };
>> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> index b6ce77f..d0ed38b 100644
>> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>> @@ -1815,7 +1815,7 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
>> {
>> struct i915_power_domains *power_domains = &dev_priv->power_domains;
>>
>> - BUILD_BUG_ON(POWER_DOMAIN_NUM > 31);
>> + BUILD_BUG_ON(POWER_DOMAIN_NUM > 63);
>>
>> mutex_init(&power_domains->lock);
>>
>> --
>> 2.1.4
>
> --
> Ville Syrjälä
> Intel OTC
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