[Intel-gfx] [PATCH 09/12] drm/i915: Explain usage of power well IDs vs bit groups

[Patrik Jakobsson]

Signed-off-by: Patrik Jakobsson <patrik.jakobsson at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e6d88f5..31b3a84 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -621,6 +621,7 @@ enum punit_power_well {
 	PUNIT_POWER_WELL_DPIO_RX1		= 11,
 	PUNIT_POWER_WELL_DPIO_CMN_D		= 12,
 
+	/* Not actual bit groups. Used as IDs for lookup_power_well() */
 	PUNIT_POWER_WELL_ALWAYS_ON,
 };
 
@@ -633,6 +634,7 @@ enum skl_disp_power_wells {
 	SKL_DISP_PW_1 = 14,
 	SKL_DISP_PW_2,
 
+	/* Not actual bit groups. Used as IDs for lookup_power_well() */
 	SKL_DISP_PW_ALWAYS_ON,
 };
 
-- 
2.5.0