[Intel-gfx] [PATCH] drm/i915/bxt: Broxton doesn't use gen9 scaling for rps frequencies.

[Mika Kuoppala]

Bob Paauwe <bob.j.paauwe at intel.com> writes:

> Signed-off-by: Bob Paauwe <bob.j.paauwe at intel.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92768
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 647c0ff..fc5097f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7138,7 +7138,7 @@ static int chv_freq_opcode(struct drm_i915_private *dev_priv, int val)
>  
>  int intel_gpu_freq(struct drm_i915_private *dev_priv, int val)
>  {
> -	if (IS_GEN9(dev_priv->dev))
> +	if (IS_GEN9(dev_priv->dev) && !IS_BROXTON(dev_priv->dev))
>  		return (val * GT_FREQUENCY_MULTIPLIER) /
>  GEN9_FREQ_SCALER;

Documentation disagrees with this patch. The units are 16.67Mhz
thus we should use 50/3.

-Mika

>  	else if (IS_CHERRYVIEW(dev_priv->dev))
>  		return chv_gpu_freq(dev_priv, val);
> @@ -7150,7 +7150,7 @@ int intel_gpu_freq(struct drm_i915_private *dev_priv, int val)
>  
>  int intel_freq_opcode(struct drm_i915_private *dev_priv, int val)
>  {
> -	if (IS_GEN9(dev_priv->dev))
> +	if (IS_GEN9(dev_priv->dev) && !IS_BROXTON(dev_priv->dev))
>  		return (val * GEN9_FREQ_SCALER) / GT_FREQUENCY_MULTIPLIER;
>  	else if (IS_CHERRYVIEW(dev_priv->dev))
>  		return chv_freq_opcode(dev_priv, val);
> -- 
> 2.4.3
>
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