[Intel-gfx] [RFC 0/5] LRC irq handler cleanups

[Tvrtko Ursulin]

From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Some random bits to make the LRC irq handler do fewer branching,
locking and VMA lookups per interrupt handled.

I failed to measure a significant gain on a powerful chip but it
definitely results in fewer instructions and branches in the hot
path. So maybe it would help a lower power chip more.

Possibly makes the first run of gem_exec_nop have less variance
eg. branch predictor maybe gets warmed up sooner but I am not
completely confident in this interpretation.

Tvrtko Ursulin (5):
  drm/i915: Avoid invariant conditionals in lrc interrupt handler
  drm/i915: Move LRCA check out of the hot path
  drm/i915: Cache LRCA in the context
  drm/i915: Grab one forcewake across the whole LRC irq handler
  drm/i915: Only grab and calculate timestamps when needed

 drivers/gpu/drm/i915/i915_debugfs.c     |  15 ++--
 drivers/gpu/drm/i915/i915_drv.h         |   1 +
 drivers/gpu/drm/i915/i915_gem.c         |  15 ++--
 drivers/gpu/drm/i915/intel_lrc.c        | 131 +++++++++++++++++++-------------
 drivers/gpu/drm/i915/intel_lrc.h        |   3 +-
 drivers/gpu/drm/i915/intel_ringbuffer.h |   2 +
 6 files changed, 97 insertions(+), 70 deletions(-)

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1.9.1