[Intel-gfx] [PATCH] drm/i915: Reset dpll_hw_state when selecting a new pll on hsw

Gabriel Feceoru gabriel.feceoru at intel.com
Thu Nov 12 10:35:20 PST 2015



On 12.11.2015 10:28, Lankhorst, Maarten wrote:
> Hey,
>
>
> Gabriel Feceoru schreef op wo 11-11-2015 om 20:27 [+0200]:
>>
>> On 11.11.2015 16:21, Jani Nikula wrote:
>>> On Wed, 11 Nov 2015, Ander Conselvan De Oliveira <conselvan2 at gmail.com> wrote:
>>>> On Tue, 2015-11-10 at 14:53 +0200, Jani Nikula wrote:
>>>>> Ander, Maarten, where are we with this? Is it horribly wrong to merge
>>>>> the original patch in this ever-growing and diverging thread?
>>>>
>>>> I think the patch as is will cause problems with DP, since we might clear the
>>>> pll selection made in hsw_dp_set_ddi_pll_sel(). I think the easy fix
>>>> disregarding the discussion in this thread is to drop another memset in
>>>>    intel_crt_compute_config(). Like this
>>>
>>>
>>> Ander, please post this as a proper patch for review.
>>>
>>> BR,
>>> Jani.
>>
>> Hi,
>> I tested this patch on my system and I can confirm it fixes the original
>> issue.
>> However there are a few memset in *_ddi_pll_select functions which might
>> not be needed anymore. For instance I tried to remove the hsw one and
>> didn't see any regression.
>
> Could you test
> http://lists.freedesktop.org/archives/intel-gfx/2015-September/075964.html
> ?
>
> Should be a less duct-tape fix..

Hi Marteen,
I tested this (hsw only) and this is a good fix, too. I get similar 
results with Ander's patch.

Gabriel.
>
> ~Maarten
>


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