[Intel-gfx] [PATCH 06/10] drm/i915/skl: don't toggle PW1 and MISC power wells on-demand

Patrik Jakobsson patrik.jakobsson at linux.intel.com
Fri Nov 13 01:31:22 PST 2015


On Wed, Nov 04, 2015 at 07:24:15PM +0200, Imre Deak wrote:
> With the DMC firmware installed we don't need to handle HW resources
> that are handled automatically by the firmware. Besides beeing redundant
> this can also interfere with the firmware, possibly getting it into a
> broken/blocked state. The on-demand handling of PW1 was already half-way
> removed, MISC IO was still handled in this way. After the last patch we
> init/uninit these HW resources manually as part of the display core
> init/uninit sequence, so we can now remove the on-demand handling for
> these completely.
> 
> We still keep around the power wells (with no domains attached to them)
> since the manual toggling during display core init/uninit happens via
> the current API.

Did the "don't touch PW1 and Misc IO" also apply to BXT DMC? Need to make sure
we catch all of these fixes/changes in a BXT follow-up series later on.

Reviewed-by: Patrik Jakobsson <patrik.jakobsson at linux.intel.com>

> 
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 36 +++++++++------------------------
>  1 file changed, 9 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index dce76ff..b9a0493 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -305,16 +305,6 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv,
>  	BIT(POWER_DOMAIN_AUDIO) |			\
>  	BIT(POWER_DOMAIN_VGA) |				\
>  	BIT(POWER_DOMAIN_INIT))
> -#define SKL_DISPLAY_POWERWELL_1_POWER_DOMAINS (		\
> -	SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS |		\
> -	BIT(POWER_DOMAIN_PLLS) |			\
> -	BIT(POWER_DOMAIN_PIPE_A) |			\
> -	BIT(POWER_DOMAIN_TRANSCODER_EDP) |		\
> -	BIT(POWER_DOMAIN_PIPE_A_PANEL_FITTER) |		\
> -	BIT(POWER_DOMAIN_PORT_DDI_A_2_LANES) |		\
> -	BIT(POWER_DOMAIN_PORT_DDI_A_4_LANES) |		\
> -	BIT(POWER_DOMAIN_AUX_A) |			\
> -	BIT(POWER_DOMAIN_INIT))
>  #define SKL_DISPLAY_DDI_A_E_POWER_DOMAINS (		\
>  	BIT(POWER_DOMAIN_PORT_DDI_A_2_LANES) |		\
>  	BIT(POWER_DOMAIN_PORT_DDI_A_4_LANES) |		\
> @@ -332,18 +322,13 @@ static void hsw_set_power_well(struct drm_i915_private *dev_priv,
>  	BIT(POWER_DOMAIN_PORT_DDI_D_2_LANES) |		\
>  	BIT(POWER_DOMAIN_PORT_DDI_D_4_LANES) |		\
>  	BIT(POWER_DOMAIN_INIT))
> -#define SKL_DISPLAY_MISC_IO_POWER_DOMAINS (		\
> -	SKL_DISPLAY_POWERWELL_1_POWER_DOMAINS |		\
> -	BIT(POWER_DOMAIN_PLLS) |			\
> -	BIT(POWER_DOMAIN_INIT))
>  #define SKL_DISPLAY_ALWAYS_ON_POWER_DOMAINS (		\
> -	(POWER_DOMAIN_MASK & ~(SKL_DISPLAY_POWERWELL_1_POWER_DOMAINS |	\
> +	(POWER_DOMAIN_MASK & ~(				\
>  	SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS |		\
>  	SKL_DISPLAY_DDI_A_E_POWER_DOMAINS |		\
>  	SKL_DISPLAY_DDI_B_POWER_DOMAINS |		\
>  	SKL_DISPLAY_DDI_C_POWER_DOMAINS |		\
> -	SKL_DISPLAY_DDI_D_POWER_DOMAINS |		\
> -	SKL_DISPLAY_MISC_IO_POWER_DOMAINS)) |		\
> +	SKL_DISPLAY_DDI_D_POWER_DOMAINS)) |		\
>  	BIT(POWER_DOMAIN_INIT))
>  
>  #define BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS (		\
> @@ -662,14 +647,9 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv,
>  		}
>  	} else {
>  		if (enable_requested) {
> -			if (IS_SKYLAKE(dev) &&
> -				(power_well->data == SKL_DISP_PW_1))
> -				DRM_DEBUG_KMS("Not Disabling PW1, dmc will handle\n");
> -			else {
> -				I915_WRITE(HSW_PWR_WELL_DRIVER,	tmp & ~req_mask);
> -				POSTING_READ(HSW_PWR_WELL_DRIVER);
> -				DRM_DEBUG_KMS("Disabling %s\n", power_well->name);
> -			}
> +			I915_WRITE(HSW_PWR_WELL_DRIVER,	tmp & ~req_mask);
> +			POSTING_READ(HSW_PWR_WELL_DRIVER);
> +			DRM_DEBUG_KMS("Disabling %s\n", power_well->name);
>  
>  			if (GEN9_ENABLE_DC5(dev) &&
>  				power_well->data == SKL_DISP_PW_2)
> @@ -1741,13 +1721,15 @@ static struct i915_power_well skl_power_wells[] = {
>  	},
>  	{
>  		.name = "power well 1",
> -		.domains = SKL_DISPLAY_POWERWELL_1_POWER_DOMAINS,
> +		/* Handled by the DMC firmware */
> +		.domains = 0,
>  		.ops = &skl_power_well_ops,
>  		.data = SKL_DISP_PW_1,
>  	},
>  	{
>  		.name = "MISC IO power well",
> -		.domains = SKL_DISPLAY_MISC_IO_POWER_DOMAINS,
> +		/* Handled by the DMC firmware */
> +		.domains = 0,
>  		.ops = &skl_power_well_ops,
>  		.data = SKL_DISP_PW_MISC_IO,
>  	},
> -- 
> 2.1.4
> 


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