[Intel-gfx] [PATCH 1/3] drm/i915: Add support for mapping an object page by page
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Fri Nov 13 06:57:25 PST 2015
Hi,
On 09/11/15 10:56, ankitprasad.r.sharma at intel.com wrote:
> From: Chris Wilson <chris at chris-wilson.co.uk>
>
> Introduced a new vm specfic callback insert_page() to program a single pte in
> ggtt or ppgtt. This allows us to map a single page in to the mappable aperture
> space. This can be iterated over to access the whole object by using space as
> meagre as page size.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Ankitprasad Sharma <ankitprasad.r.sharma at intel.com>
> ---
> drivers/char/agp/intel-gtt.c | 9 +++++++
> drivers/gpu/drm/i915/i915_gem_gtt.c | 49 +++++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_gem_gtt.h | 5 ++++
> include/drm/intel-gtt.h | 3 +++
> 4 files changed, 66 insertions(+)
>
> diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
> index 1341a94..7c68576 100644
> --- a/drivers/char/agp/intel-gtt.c
> +++ b/drivers/char/agp/intel-gtt.c
> @@ -838,6 +838,15 @@ static bool i830_check_flags(unsigned int flags)
> return false;
> }
>
> +void intel_gtt_insert_page(dma_addr_t addr,
> + unsigned int pg,
> + unsigned int flags)
> +{
> + intel_private.driver->write_entry(addr, pg, flags);
> + wmb();
> +}
> +EXPORT_SYMBOL(intel_gtt_insert_page);
> +
> void intel_gtt_insert_sg_entries(struct sg_table *st,
> unsigned int pg_start,
> unsigned int flags)
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 016739e..9fd1f857 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2345,6 +2345,23 @@ static void gen8_set_pte(void __iomem *addr, gen8_pte_t pte)
> #endif
> }
>
> +static void gen8_ggtt_insert_page(struct i915_address_space *vm,
> + dma_addr_t addr,
> + uint64_t offset,
> + enum i915_cache_level level,
> + u32 unused)
> +{
I am not sure about the interface consistency. insert_entries works on a
sg and this would now need a DMA address which is encapsulated in the
former.
How about extending insert_pages to take a page_offset and size in
pages? The latter could default to obj size if zero.
> + struct drm_i915_private *dev_priv = to_i915(vm->dev);
> + gen8_pte_t __iomem *pte =
> + (gen8_pte_t __iomem *)dev_priv->gtt.gsm +
> + (offset >> PAGE_SHIFT);
> +
> + gen8_set_pte(pte, gen8_pte_encode(addr, level, true));
> + wmb();
> +
> + I915_WRITE(GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
gen8_ggtt_insert_entries doesn't do the wmb() but does a posting read on
GFX_FLSH_CNTL_GEN6. Why is that difference?
Regards,
Tvrtko
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