[Intel-gfx] [PATCH] Revert "drm/i915: Initialize HWS page address after GPU reset"

[Daniel Vetter]

On Thu, Nov 19, 2015 at 04:47:44PM +0000, Arun Siluvery wrote:
> This reverts commit 2e5356da370e36ba7aab39d2800c7a2412630ae7.
> 
> It is now redundant as it is already covered in below commit which introduced
> the changes to reuse initialization of resources in resume/reset path.
> 
> commit e84fe80337dc85cca07d0417ea97edbec4789d8b
> Author: Nick Hoath <nicholas.hoath at intel.com>
> Date:   Fri Sep 11 12:53:46 2015 +0100
> 
>     drm/i915: Split alloc from init for lrc
> 
> lrc_setup_hardware_status_page() in the same function gen8_init_common_ring()
> takes care of this.
> 
> Cc: Nick Hoath <nicholas.hoath at intel.com>
> Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
> Signed-off-by: Arun Siluvery <arun.siluvery at linux.intel.com>

Queued for -next, thanks for the patch.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_lrc.c | 6 ------
>  1 file changed, 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index ad8b456..4ebafab 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1479,12 +1479,6 @@ static int gen8_init_common_ring(struct intel_engine_cs *ring)
>  	I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask));
>  	I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff);
>  
> -	if (ring->status_page.obj) {
> -		I915_WRITE(RING_HWS_PGA(ring->mmio_base),
> -			   (u32)ring->status_page.gfx_addr);
> -		POSTING_READ(RING_HWS_PGA(ring->mmio_base));
> -	}
> -
>  	I915_WRITE(RING_MODE_GEN7(ring),
>  		   _MASKED_BIT_DISABLE(GFX_REPLAY_MODE) |
>  		   _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
> -- 
> 1.9.1
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch