[Intel-gfx] [PATCH 2/7] drm/i915: sseu: use sseu_dev_info in device info

Ben Widawsky benjamin.widawsky at intel.com
Thu Nov 19 15:18:31 PST 2015


On Wed, Oct 21, 2015 at 06:40:32PM +0300, Imre Deak wrote:
> Move all slice/subslice/eu related properties to the sseu_dev_info
> struct.
> 
> No functional change.
> 
> Signed-off-by: Imre Deak <imre.deak at intel.com>

Reviewed-by: Ben Widawsky <benjamin.widawsky at intel.com>

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c     | 25 ++++++++++++------------
>  drivers/gpu/drm/i915/i915_dma.c         | 34 +++++++++++++++++----------------
>  drivers/gpu/drm/i915/i915_drv.h         | 16 ++++++----------
>  drivers/gpu/drm/i915/intel_lrc.c        | 14 +++++++-------
>  drivers/gpu/drm/i915/intel_pm.c         |  2 +-
>  drivers/gpu/drm/i915/intel_ringbuffer.c |  4 ++--
>  6 files changed, 47 insertions(+), 48 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 3dd7076..de188d0 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -5017,7 +5017,7 @@ static void gen9_sseu_device_status(struct drm_device *dev,
>  		stat->slice_total++;
>  
>  		if (IS_SKYLAKE(dev))
> -			ss_cnt = INTEL_INFO(dev)->subslice_per_slice;
> +			ss_cnt = INTEL_INFO(dev)->sseu.subslice_per_slice;
>  
>  		for (ss = 0; ss < ss_max; ss++) {
>  			unsigned int eu_cnt;
> @@ -5055,15 +5055,16 @@ static void broadwell_sseu_device_status(struct drm_device *dev,
>  	stat->slice_total = hweight32(slice_info & GEN8_LSLICESTAT_MASK);
>  
>  	if (stat->slice_total) {
> -		stat->subslice_per_slice = INTEL_INFO(dev)->subslice_per_slice;
> +		stat->subslice_per_slice =
> +				INTEL_INFO(dev)->sseu.subslice_per_slice;
>  		stat->subslice_total = stat->slice_total *
>  				       stat->subslice_per_slice;
> -		stat->eu_per_subslice = INTEL_INFO(dev)->eu_per_subslice;
> +		stat->eu_per_subslice = INTEL_INFO(dev)->sseu.eu_per_subslice;
>  		stat->eu_total = stat->eu_per_subslice * stat->subslice_total;
>  
>  		/* subtract fused off EU(s) from enabled slice(s) */
>  		for (s = 0; s < stat->slice_total; s++) {
> -			u8 subslice_7eu = INTEL_INFO(dev)->subslice_7eu[s];
> +			u8 subslice_7eu = INTEL_INFO(dev)->sseu.subslice_7eu[s];
>  
>  			stat->eu_total -= hweight8(subslice_7eu);
>  		}
> @@ -5081,21 +5082,21 @@ static int i915_sseu_status(struct seq_file *m, void *unused)
>  
>  	seq_puts(m, "SSEU Device Info\n");
>  	seq_printf(m, "  Available Slice Total: %u\n",
> -		   INTEL_INFO(dev)->slice_total);
> +		   INTEL_INFO(dev)->sseu.slice_total);
>  	seq_printf(m, "  Available Subslice Total: %u\n",
> -		   INTEL_INFO(dev)->subslice_total);
> +		   INTEL_INFO(dev)->sseu.subslice_total);
>  	seq_printf(m, "  Available Subslice Per Slice: %u\n",
> -		   INTEL_INFO(dev)->subslice_per_slice);
> +		   INTEL_INFO(dev)->sseu.subslice_per_slice);
>  	seq_printf(m, "  Available EU Total: %u\n",
> -		   INTEL_INFO(dev)->eu_total);
> +		   INTEL_INFO(dev)->sseu.eu_total);
>  	seq_printf(m, "  Available EU Per Subslice: %u\n",
> -		   INTEL_INFO(dev)->eu_per_subslice);
> +		   INTEL_INFO(dev)->sseu.eu_per_subslice);
>  	seq_printf(m, "  Has Slice Power Gating: %s\n",
> -		   yesno(INTEL_INFO(dev)->has_slice_pg));
> +		   yesno(INTEL_INFO(dev)->sseu.has_slice_pg));
>  	seq_printf(m, "  Has Subslice Power Gating: %s\n",
> -		   yesno(INTEL_INFO(dev)->has_subslice_pg));
> +		   yesno(INTEL_INFO(dev)->sseu.has_subslice_pg));
>  	seq_printf(m, "  Has EU Power Gating: %s\n",
> -		   yesno(INTEL_INFO(dev)->has_eu_pg));
> +		   yesno(INTEL_INFO(dev)->sseu.has_eu_pg));
>  
>  	seq_puts(m, "SSEU Device Status\n");
>  	memset(&stat, 0, sizeof(stat));
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 2336af9..be8e141 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -154,12 +154,12 @@ static int i915_getparam(struct drm_device *dev, void *data,
>  		value = 1;
>  		break;
>  	case I915_PARAM_SUBSLICE_TOTAL:
> -		value = INTEL_INFO(dev)->subslice_total;
> +		value = INTEL_INFO(dev)->sseu.subslice_total;
>  		if (!value)
>  			return -ENODEV;
>  		break;
>  	case I915_PARAM_EU_TOTAL:
> -		value = INTEL_INFO(dev)->eu_total;
> +		value = INTEL_INFO(dev)->sseu.eu_total;
>  		if (!value)
>  			return -ENODEV;
>  		break;
> @@ -553,10 +553,10 @@ static void i915_dump_device_info(struct drm_i915_private *dev_priv)
>  static void cherryview_sseu_info_init(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_device_info *info;
> +	struct sseu_dev_info *info;
>  	u32 fuse, eu_dis;
>  
> -	info = (struct intel_device_info *)&dev_priv->info;
> +	info = (struct sseu_dev_info *)&INTEL_INFO(dev_priv)->sseu;
>  	fuse = I915_READ(CHV_FUSE_GT);
>  
>  	info->slice_total = 1;
> @@ -596,13 +596,13 @@ static void cherryview_sseu_info_init(struct drm_device *dev)
>  static void gen9_sseu_info_init(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_device_info *info;
> +	struct sseu_dev_info *info;
>  	int s_max = 3, ss_max = 4, eu_max = 8;
>  	int s, ss;
>  	u32 fuse2, s_enable, ss_disable, eu_disable;
>  	u8 eu_mask = 0xff;
>  
> -	info = (struct intel_device_info *)&dev_priv->info;
> +	info = (struct sseu_dev_info *)&INTEL_INFO(dev_priv)->sseu;
>  	fuse2 = I915_READ(GEN8_FUSE2);
>  	s_enable = (fuse2 & GEN8_F2_S_ENA_MASK) >>
>  		   GEN8_F2_S_ENA_SHIFT;
> @@ -676,7 +676,7 @@ static void gen9_sseu_info_init(struct drm_device *dev)
>  static void broadwell_sseu_info_init(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
> -	struct intel_device_info *info;
> +	struct sseu_dev_info *info;
>  	const int s_max = 3, ss_max = 3, eu_max = 8;
>  	int s, ss;
>  	u32 fuse2, eu_disable[s_max], s_enable, ss_disable;
> @@ -694,7 +694,8 @@ static void broadwell_sseu_info_init(struct drm_device *dev)
>  			 (32 - GEN8_EU_DIS1_S2_SHIFT));
>  
>  
> -	info = (struct intel_device_info *)&dev_priv->info;
> +	info = (struct sseu_dev_info *)&INTEL_INFO(dev_priv)->sseu;
> +
>  	info->slice_total = hweight32(s_enable);
>  
>  	/*
> @@ -824,17 +825,18 @@ static void intel_device_info_runtime_init(struct drm_device *dev)
>  	else if (INTEL_INFO(dev)->gen >= 9)
>  		gen9_sseu_info_init(dev);
>  
> -	DRM_DEBUG_DRIVER("slice total: %u\n", info->slice_total);
> -	DRM_DEBUG_DRIVER("subslice total: %u\n", info->subslice_total);
> -	DRM_DEBUG_DRIVER("subslice per slice: %u\n", info->subslice_per_slice);
> -	DRM_DEBUG_DRIVER("EU total: %u\n", info->eu_total);
> -	DRM_DEBUG_DRIVER("EU per subslice: %u\n", info->eu_per_subslice);
> +	DRM_DEBUG_DRIVER("slice total: %u\n", info->sseu.slice_total);
> +	DRM_DEBUG_DRIVER("subslice total: %u\n", info->sseu.subslice_total);
> +	DRM_DEBUG_DRIVER("subslice per slice: %u\n",
> +						info->sseu.subslice_per_slice);
> +	DRM_DEBUG_DRIVER("EU total: %u\n", info->sseu.eu_total);
> +	DRM_DEBUG_DRIVER("EU per subslice: %u\n", info->sseu.eu_per_subslice);
>  	DRM_DEBUG_DRIVER("has slice power gating: %s\n",
> -			 info->has_slice_pg ? "y" : "n");
> +			 info->sseu.has_slice_pg ? "y" : "n");
>  	DRM_DEBUG_DRIVER("has subslice power gating: %s\n",
> -			 info->has_subslice_pg ? "y" : "n");
> +			 info->sseu.has_subslice_pg ? "y" : "n");
>  	DRM_DEBUG_DRIVER("has EU power gating: %s\n",
> -			 info->has_eu_pg ? "y" : "n");
> +			 info->sseu.has_eu_pg ? "y" : "n");
>  }
>  
>  static void intel_init_dpio(struct drm_i915_private *dev_priv)
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 73ff01f..cb0427d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -788,6 +788,11 @@ struct sseu_dev_info {
>  	u8 subslice_per_slice;
>  	u8 eu_total;
>  	u8 eu_per_subslice;
> +	/* For each slice, which subslice(s) has(have) 7 EUs (bitfield)? */
> +	u8 subslice_7eu[3];
> +	u8 has_slice_pg:1;
> +	u8 has_subslice_pg:1;
> +	u8 has_eu_pg:1;
>  };
>  
>  struct intel_device_info {
> @@ -805,16 +810,7 @@ struct intel_device_info {
>  	int cursor_offsets[I915_MAX_PIPES];
>  
>  	/* Slice/subslice/EU info */
> -	u8 slice_total;
> -	u8 subslice_total;
> -	u8 subslice_per_slice;
> -	u8 eu_total;
> -	u8 eu_per_subslice;
> -	/* For each slice, which subslice(s) has(have) 7 EUs (bitfield)? */
> -	u8 subslice_7eu[3];
> -	u8 has_slice_pg:1;
> -	u8 has_subslice_pg:1;
> -	u8 has_eu_pg:1;
> +	struct sseu_dev_info sseu;
>  };
>  
>  #undef DEFINE_FLAG
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 88e12bd..8a55f8a 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -2200,24 +2200,24 @@ make_rpcs(struct drm_device *dev)
>  	 * must make an explicit request through RPCS for full
>  	 * enablement.
>  	*/
> -	if (INTEL_INFO(dev)->has_slice_pg) {
> +	if (INTEL_INFO(dev)->sseu.has_slice_pg) {
>  		rpcs |= GEN8_RPCS_S_CNT_ENABLE;
> -		rpcs |= INTEL_INFO(dev)->slice_total <<
> +		rpcs |= INTEL_INFO(dev)->sseu.slice_total <<
>  			GEN8_RPCS_S_CNT_SHIFT;
>  		rpcs |= GEN8_RPCS_ENABLE;
>  	}
>  
> -	if (INTEL_INFO(dev)->has_subslice_pg) {
> +	if (INTEL_INFO(dev)->sseu.has_subslice_pg) {
>  		rpcs |= GEN8_RPCS_SS_CNT_ENABLE;
> -		rpcs |= INTEL_INFO(dev)->subslice_per_slice <<
> +		rpcs |= INTEL_INFO(dev)->sseu.subslice_per_slice <<
>  			GEN8_RPCS_SS_CNT_SHIFT;
>  		rpcs |= GEN8_RPCS_ENABLE;
>  	}
>  
> -	if (INTEL_INFO(dev)->has_eu_pg) {
> -		rpcs |= INTEL_INFO(dev)->eu_per_subslice <<
> +	if (INTEL_INFO(dev)->sseu.has_eu_pg) {
> +		rpcs |= INTEL_INFO(dev)->sseu.eu_per_subslice <<
>  			GEN8_RPCS_EU_MIN_SHIFT;
> -		rpcs |= INTEL_INFO(dev)->eu_per_subslice <<
> +		rpcs |= INTEL_INFO(dev)->sseu.eu_per_subslice <<
>  			GEN8_RPCS_EU_MAX_SHIFT;
>  		rpcs |= GEN8_RPCS_ENABLE;
>  	}
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index df22b9c..dad0a67 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5101,7 +5101,7 @@ static int cherryview_rps_max_freq(struct drm_i915_private *dev_priv)
>  
>  	val = vlv_punit_read(dev_priv, FB_GFX_FMAX_AT_VMAX_FUSE);
>  
> -	switch (INTEL_INFO(dev)->eu_total) {
> +	switch (INTEL_INFO(dev)->sseu.eu_total) {
>  	case 8:
>  		/* (2 * 4) config */
>  		rp0 = (val >> FB_GFX_FMAX_AT_VMAX_2SS4EU_FUSE_SHIFT);
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index a492705..57a756d 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1000,7 +1000,7 @@ static int skl_tune_iz_hashing(struct intel_engine_cs *ring)
>  		 * Only consider slices where one, and only one, subslice has 7
>  		 * EUs
>  		 */
> -		if (hweight8(dev_priv->info.subslice_7eu[i]) != 1)
> +		if (hweight8(INTEL_INFO(dev_priv)->sseu.subslice_7eu[i]) != 1)
>  			continue;
>  
>  		/*
> @@ -1009,7 +1009,7 @@ static int skl_tune_iz_hashing(struct intel_engine_cs *ring)
>  		 *
>  		 * ->    0 <= ss <= 3;
>  		 */
> -		ss = ffs(dev_priv->info.subslice_7eu[i]) - 1;
> +		ss = ffs(INTEL_INFO(dev_priv)->sseu.subslice_7eu[i]) - 1;
>  		vals[i] = 3 - ss;
>  	}
>  
> -- 
> 2.1.4
> 

-- 
Ben Widawsky, Intel Open Source Technology Center


More information about the Intel-gfx mailing list