[Intel-gfx] [PATCH 4/7] drm/i915: sseu: convert slice count field to mask

Ville Syrjälä ville.syrjala at linux.intel.com
Fri Nov 20 05:00:27 PST 2015


On Thu, Nov 19, 2015 at 03:40:45PM -0800, Ben Widawsky wrote:
> On Wed, Oct 21, 2015 at 06:40:34PM +0300, Imre Deak wrote:
> > In an upcoming patch we'll need the actual mask of slices in addition to
> > their count, so replace the count field with a mask.
> > 
> > Signed-off-by: Imre Deak <imre.deak at intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_debugfs.c | 14 +++++++-------
> >  drivers/gpu/drm/i915/i915_dma.c     | 37 +++++++++++++++++++------------------
> >  drivers/gpu/drm/i915/i915_drv.h     |  2 +-
> >  drivers/gpu/drm/i915/intel_lrc.c    |  2 +-
> >  4 files changed, 28 insertions(+), 27 deletions(-)
>>  
<snip>
> > diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> > index 8a55f8a..4130ff1 100644
> > --- a/drivers/gpu/drm/i915/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/intel_lrc.c
> > @@ -2202,7 +2202,7 @@ make_rpcs(struct drm_device *dev)
> >  	*/
> >  	if (INTEL_INFO(dev)->sseu.has_slice_pg) {
> >  		rpcs |= GEN8_RPCS_S_CNT_ENABLE;
> > -		rpcs |= INTEL_INFO(dev)->sseu.slice_total <<
> > +		rpcs |= hweight32(INTEL_INFO(dev)->sseu.slice_mask) <<
> 			^ hweight8?
> 
> >  			GEN8_RPCS_S_CNT_SHIFT;
> >  		rpcs |= GEN8_RPCS_ENABLE;
> >  	}
> 
> I'm not positive if hweight32 is actually okay on an 8bit type. I remember Ville
> correcting me once on this, but I can't remember it's correct. Assuming
> hweight32 is fine to use, with or without my recommendations, this is:
> Reviewed-by: Ben Widawsky <benjamin.widawsky at intel.com>

I think my hweight8() comment (w.r.t. some patches IIRC) was just an
idea for a micro-optimizition. C promotes small stuff to ints anyway
so I assume hweight32() is just fine functionally.

-- 
Ville Syrjälä
Intel OTC


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