[Intel-gfx] [PATCH] drm/i915/skl: CDCLK change during modeset based on VCO in use.

[Ville Syrjälä]

On Fri, Nov 20, 2015 at 07:03:28PM +0000, Daniel Stone wrote:
> On 20 November 2015 at 13:55, Ville Syrjälä
> <ville.syrjala at linux.intel.com> wrote:
> > On Thu, Nov 19, 2015 at 09:20:16AM -0800, clinton.a.taylor at intel.com wrote:
> >> +static int skl_modeset_calc_cdclk(struct drm_atomic_state *state)
> >> +{
> >> +     struct drm_i915_private *dev_priv = to_i915(state->dev);
> >> +     int max_pixclk = ilk_max_pixel_rate(state);
> >> +     int cdclk;
> >> +     uint32_t linkrate;
> >> +
> >> +     linkrate = (I915_READ(DPLL_CTRL1) &
> >> +                 DPLL_CTRL1_LINK_RATE_MASK(SKL_DPLL0)) >> 1;
> >
> > I don't think we should read this from the hardware here. Instead
> > we should stash the proper vco somewhere under dev_priv.
> 
> In state rather than dev_priv, surely?

No, it's going to be a fixed value, so doesn't need to be recomputed
ever.

-- 
Ville Syrjälä
Intel OTC