[Intel-gfx] [RFC 18/37] drm/i915/guc: Fill in (part of?) the ADS whitelist

[John.C.Harrison at Intel.com]

From: Dave Gordon <david.s.gordon at intel.com>

For: VIZ-2021
Signed-off-by: Dave Gordon <david.s.gordon at intel.com>
---
 drivers/gpu/drm/i915/i915_guc_submission.c | 11 +++++++++++
 drivers/gpu/drm/i915/intel_guc_fwif.h      |  6 ++++++
 2 files changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 035f126..59116fb 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -931,6 +931,7 @@ static void guc_create_addon(struct intel_guc *guc)
 {
 	struct drm_i915_private *dev_priv = guc_to_i915(guc);
 	struct drm_i915_gem_object *obj;
+	struct guc_mmio_reg_state *reg_state;
 	struct guc_ads *ads;
 	struct intel_engine_cs *ring;
 	struct page *page;
@@ -964,6 +965,16 @@ static void guc_create_addon(struct intel_guc *guc)
 	ads->mmio_reg_state_addr = i915_gem_obj_ggtt_offset(obj) +
 			PAGE_ALIGN(sizeof(struct guc_ads));
 
+	i = PAGE_ALIGN(sizeof(struct guc_ads)) / PAGE_SIZE;
+	page = i915_gem_object_get_page(obj, i);
+
+	reg_state = kmap_atomic(page);
+	for (i = 0; i < I915_NUM_RINGS; i++)
+		reg_state->mmio_white_list[i].mmio_start =
+			dev_priv->ring[i].mmio_base + KM_GEN8_MMIO_WHITE_LIST_START;
+
+	kunmap_atomic(reg_state);
+
 	ads->guc_state_saved_buffer = ads->mmio_reg_state_addr +
 			PAGE_ALIGN(sizeof(struct guc_mmio_reg_state));
 
diff --git a/drivers/gpu/drm/i915/intel_guc_fwif.h b/drivers/gpu/drm/i915/intel_guc_fwif.h
index 9f5be1d..649f6d8 100644
--- a/drivers/gpu/drm/i915/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/intel_guc_fwif.h
@@ -333,6 +333,12 @@ struct guc_context_desc {
 #define GUC_REGSET_MAX_REGISTERS_PER_SET	20
 
 #define KM_MMIO_WHITE_LIST_MAX_OFFSETS 12
+
+#define KM_GEN8_MMIO_WHITE_LIST_START               0x24d0  // BSPEC Name: FORCE_TO_NONPRIV
+#define KM_GEN8_MMIO_WHITE_LIST_END                 0x24ff
+#define KM_GEN8_MMIO_WHITE_LIST_DEFAULT             0x2094
+#define KM_GEN8_MMIO_WHITE_LIST_NONFUNCTONAL_INDEX  4   // The fifth element doesn't work but the index would be 4
+
 struct guc_mmio_white_list {
 	u32 mmio_start;
 	u32 offsets[KM_MMIO_WHITE_LIST_MAX_OFFSETS];
-- 
1.9.1